TC74HC109AF_07 datasheet(5/10 Pages) TOSHIBA

Il numero della parte	TC74HC109AF

Spiegazioni elettronici	CMOS Digital Integrated Circuit Silicon Monolithic Dual J-K Flip-Flop with Preset and Clear

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Produttore elettronici	TOSHIBA [Toshiba Semiconductor]

Homepage	http://www.semicon.toshiba.co.jp/eng

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5 / 10 page

TC74HC109AP/AF/AFN

2007-10-01

5

Timing Requirements (input: tr = tf = 6 ns)

Test Condition

Ta

= 25°C

Ta

=

−40

~85°C

Characteristics

Symbol

VCC (V)

Typ.

Limit

Unit

Minimum pulse width

(CK)

tW (L)

tW (H)

⎯

2.0

4.5

6.0

⎯

75

15

13

95

19

16

ns

Minimum pulse width

(

PR ,

CLR )

tW (L)

⎯

2.0

4.5

6.0

⎯

75

15

13

95

19

16

ns

Minimum set-up time

ts

⎯

2.0

4.5

6.0

⎯

75

15

13

95

19

16

ns

Minimum hold time

th

⎯

2.0

4.5

6.0

⎯

0

ns

Minimum removal time

( PR , CLR )

trem

⎯

2.0

4.5

6.0

⎯

50

10

9

65

13

11

ns

Clock frequency

f

⎯

2.0

4.5

6.0

⎯

6

31

36

5

25

29

MHz

AC Characteristics (CL = 15 pF, VCC = 5 V, Ta = 25°C, input: tr = tf = 6 ns)

Characteristics

Symbol

Test Condition

Min

Typ.

Max

Unit

Output transition time

tTLH

tTHL

⎯

6

12

ns

Propagation delay time

(CK-Q, Q)

tpLH

tpHL

⎯

13

26

ns

Propagation delay time

( PR ,

CLR -Q, Q )

tpLH

tpHL

⎯

13

26

ns

Maximum clock frequency

fmax

⎯

33

63

⎯

MHz

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