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74LVC3G34GM Scheda tecnica(PDF) 2 Page - NXP Semiconductors |
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74LVC3G34GM Scheda tecnica(HTML) 2 Page - NXP Semiconductors |
2 / 14 page 74LVC3G34_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 5 October 2007 2 of 14 NXP Semiconductors 74LVC3G34 Triple buffer 3. Ordering information 4. Marking 5. Functional diagram Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC3G34DP −40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 74LVC3G34DC −40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 74LVC3G34GT −40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 1 × 1.95 × 0.5 mm SOT833-1 74LVC3G34GM −40 °C to +125 °C XQFN8 plastic extremely thin quad flat package; no leads; 8 terminals; body 1.6 × 1.6 × 0.5 mm SOT902-1 Table 2. Marking codes Type number Marking code 74LVC3G34DP V34 74LVC3G34DC Y34 74LVC3G34GT Y34 74LVC3G34GM Y34 Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram (one gate) 001aaa684 1A 1Y 17 3Y 3A 26 2A 2Y 35 7 1 1 1 5 3 001aaa724 1 2 6 001aac536 Y A |
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