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74LVC1G74DP Scheda tecnica(PDF) 2 Page - NXP Semiconductors |
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74LVC1G74DP Scheda tecnica(HTML) 2 Page - NXP Semiconductors |
2 / 19 page 74LVC1G74_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 9 August 2007 2 of 19 NXP Semiconductors 74LVC1G74 Single D-type flip-flop with set and reset; positive edge trigger 3. Ordering information 4. Marking 5. Functional diagram Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1G74DP −40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 74LVC1G74DC −40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 74LVC1G74GT −40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 1 × 1.95 × 0.5 mm SOT833-1 74LVC1G74GM −40 °C to +125 °C XQFN8 plastic extremely thin quad flat package; no leads; 8 terminals; body 1.6 × 1.6 × 0.5 mm SOT902-1 Table 2. Marking Type number Marking code 74LVC1G74DP V74 74LVC1G74DC V74 74LVC1G74GT V74 74LVC1G74GM V74 Fig 1. Logic symbol Fig 2. IEC logic symbol mnb139 RD FF SD 7 Q Q Q 5 2 1 3 Q SD CP CP D D 6 RD mnb140 3 1 2 C1 7 S 1D 6 R 5 |
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