SyncMOS Technologies International, Inc.

SM89516

8-Bits Micro-controller

With 64KB flash & 1KB RAM embedded

Specifications subject to change without notice contact your sales representatives for the most recent information.

Ver 2.1 SM89516 08/2006

7

Internal RAM Control Register (RCON, $85)

bit-7

bit-0

Unused

Unused

Unused

Unused

Unused

Unused

RAMS1

RAMS0

Read / Write:

-

-

-

-

-

-

R/W

R/W

Reset value:

*

*

*

*

*

*

0

0

SM89516A has 768 byte on-chip RAM which can be accessed by external memory addressing method only. (By

instruction MOVX). The address space of instruction MOVX @Rn is determined by bit 1 and bit 0 (RAMS1, RAMS0)

of RCON. The default setting of RAMS1, RAMS0 bits is 00 (page0).

RAMS1

RAMS0

MOVX @Ri i=0,1 mapping to expended RAM address

0

0

$0000 ~ $00FF

0

1

$0100 ~ $01FF

1

0

$0200 ~ $02FF

The port 0, port2, port3.6 and port3.7 can be used as general purpose I/O pin while port0 is open-drain structure.

System Control Register (SCONF, $BF)

bit-7

bit-0

WDR

Unused

Unused

Unused

Unused

Unused

OME

ALEI

Read / Write:

R/W

-

-

-

-

-

R/W

R/W

Reset value:

0

*

*

*

*

*

1

0

WDR: Watch Dog Timer Reset. When system reset by Watch Dog Timer overflow, WDR will be set to 1

OME: 768 bytes on-chip RAM enable bit

ALEI: ALE output inhibit bit, to reduce EMI

The bit 7(WDR) of SCONF is Watch Dog Timer Reset bit. It will be set to 1 when reset signal generated

by WDT overflow. User should check WDR bit whenever un-predicted reset happened.

1.3 I/O Pin Configuration

The ports 1, 2 and 3 of standard 8051 have internal pull-up resistor, and port 0 has open-drain outputs. Each I/O pin

can be used independently as an input or an output. For I/O ports to be used as an input pin, the port bit latch must

contain a ‘1’ which turns off the output driver FET. Then for port 1, 2 and 3 port pin is pulled high by a weak internal

pull-up, and can be pulled low by an external source. The port 0 has open-drain outputs which means its pull-ups are

not active during normal port operation. Writing ‘1’ to the port 0 bit latch will causing bit floating so that it can be used as

a high-impedance input.

The port 4 used as GPIO will has the same function as port 1, 2 and 3.