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SM89T16R1L16 Scheda tecnica(PDF) 10 Page - SyncMOS Technologies,Inc |
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SM89T16R1L16 Scheda tecnica(HTML) 10 Page - SyncMOS Technologies,Inc |
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10 / 35 page  SyncMOS Technologies International, Inc. SM89T16R1 8-Bits Micro-controller With 64KB Flash ROM & 1KB RAM & Two UART & RTC & ADC & PWM embedded Specifications subject to change without notice contact your sales representatives for the most recent information. Ver 2.1 SM89T16R1 08/2006 10 AC Characteristic VCC=3.3V±10%, VSS=0V, tclk min = 1/ fmax(maximum operating frequency) TA=-40 to +85 ℃℃ CL=100pF for Port0, ALE and /PSEN; CL=80pF for all other outputs unless otherwise specified. Symbol FIGURE PARAMETER MIN MAX UNIT External Clock drive into XTAL1 tCLCL 4 Xtal1 Period 62.5 (1) - ns tCHCX 4 Xtal1 HIGH time 31 - ns tCLCX 4 Xtal1 LOW time 31 - ns tCLCH 4 XTAL1 rise time - 15 ns tCHCL 4 XTAL1 fall time - 15 ns tCYC 4 Controller cycle time = tCLCL / 4 5.2 - ns NOTES: 1. Operating at 25MHz. Symbol FIGURE PARAMETER MIN MAX UNIT Program Memory 1/tCLCL 7 System clock frequency 3.0 16 MHz tLHLL 7 ALE pulse width 1.5 tCLCL -5 ns tAVLL 7 Address valid to ALE low 0.5 tCLCL -5 ns tLLAX 7 Address hold after ALE low 0.5 tCLCL -5 ns tLLAX 8 Address hold after ALE low for MOVX Write 0.5 tCLCL -5 ns tLLIV 7 ALE LOW to valid instruction in 2.5tCLCL-20 ns tLLPL 7 ALE LOW to /PSEN LOW 0.5 tCLCL -5 ns tPLPH 7 /PSEN pulse width 2.0 tCLCL -5 ns tPLIV 7 /PSEN LOW to valid instruction in 2.0tCLCL-20 ns tPXIX 7 Input instruction hold after /PSEN 0 ns tPXIZ 7 Input instruction float after /PSEN tCLCL -5 ns tAVIV1 7 Port 0 Address to valid instruction in 3.0tCLCL-20 ns tAVIV2 7 Port 2 Address to valid instruction in 3.5tCLCL-20 ns tPLAZ 7 /PSEN low to address float 0 ns MOVX Characteristics Using Stretch Memory Cycles Symbol FIGURE PARAMETER MIN MAX UNIT Stretch tLHLL2 8 ALE pulse width 1.5 tCLCL –5 2.0 tCLCL -5 ns tMCS =0 tMCS >0 tLLAX2 9 Address hold after ALE low for MOVX Write 0.5 tCLCL -5 ns tRLRH 8 /RD pulse width 2.0 tCLCL –5 tMCS -10 ns tMCS =0 tMCS >0 tWLWH 9 /WR pulse width 2.0 tCLCL –5 tMCS -10 ns tMCS =0 tMCS >0 tRLDV 8 /RD LOW to valid data in 2.0 tCLCL –20 tMCS -20 ns tMCS =0 tMCS >0 tRHDX 8 Data hold after /RD 0 ns tRHDZ 8 Data float after /RD tCLCL –5 2.0 tCLCL –5 ns tMCS =0 tMCS >0 tLLDV 8 ALE LOW to valid data in 2.5 tCLCL –5 tMCS+2.0tCLCL –40 ns tMCS =0 tMCS >0 tAVIV1 8 Port 0 Address to valid instruction in 3.0 tCLCL-20 2.0 tCLCL –5 ns tMCS =0 tMCS >0 tAVIV2 7,8 Port 2 Address to valid instruction in 3.5 tCLCL-20 2.5 tCLCL –5 ns tMCS =0 tMCS >0 tLLWL 8,9 ALE LOW to /RD or /WR LOW 0.5 tCLCL–5 1.5 tCLCL–5 0.5 tCLCL+5 1.5 tCLCL+5 ns tMCS =0 tMCS >0 tAVWL1 8,9 Port0 Address valid to /WR or /RD LOW tCLCL–5 2.0 tCLCL–5 ns tMCS =0 tMCS >0 tAVDV2 9 Port2 Address valid to /WR or /RD LOW 1.5tCLCL–5 ns tMCS =0 |
Codice articolo simile - SM89T16R1L16 |
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Descrizione simile - SM89T16R1L16 |
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