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AD844AN Scheda tecnica(PDF) 11 Page - Analog Devices |
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AD844AN Scheda tecnica(HTML) 11 Page - Analog Devices |
11 / 16 page REV. D AD844 –11– Noise Noise sources can be modeled in a manner similar to the dc bias currents, but the noise sources are INN, INP, VN, and the amplifier induced noise at the output, VON, is: V ON = ((Inp R P ) 2 +Vn2)1+ R1 R2 2 + (Inn R1) 2 Overall noise can be reduced by keeping all resistor values to a minimum. With typical numbers, R1 = R2 = 1 k Ω, RP = 0, Vn = 2 nV/ √Hz, Inp = 10 pA/√Hz, Inn = 12 pA/√Hz, VON calculates to 12 nV/ √Hz. The current noise is dominant in this case, as it will be in most low gain applications. Video Cable Driver Using 5 Volt Supplies The AD844 can be used to drive low impedance cables. Using ±5 V supplies, a 100 Ω load can be driven to ± 2.5 V with low distortion. Figure 11a shows an illustrative application which provides a noninverting gain of 2, allowing the cable to be reverse-terminated while delivering an overall gain of +1 to the load. The –3 dB bandwidth of this circuit is typically 30 MHz. Figure 11b shows a differential gain and phase test setup. In video applications, differential-phase and differential-gain characteristics are often important. Figure 11c shows the varia- tion in phase as the load voltage varies. Figure 11d shows the gain variation. VIN 50 3 2 +5V –5V 7 6 4 2.2 F 2.2 F 50 300 300 ZO = 50 VOUT RL 50 Figure 11a. The AD844 as a Cable Driver HP8753A NETWORK ANALYZER HP11850C SPLITTER CIRCUIT UNDER TEST HP3314A STAIRCASE GENERATOR VOUT VIN VIN OUT OUT OUT IN RF OUT R EXT TRIG SYNC OUT 50 (TERMINATOR) OUT 470 Figure 11b. Differential Gain/Phase Test Setup Figure VOUT – IRE 0.3 0.2 –0.3 018 90 36 54 72 0.1 0 –0.1 –0.2 IRE = 7.14mV Figure 11c. Differential Phase for the Circuit of Figure 11a VOUT – IRE 0.06 0.04 –0.06 0 18 90 36 54 72 0.02 0 –0.02 –0.04 IRE = 7.14mV Figure 11d. Differential Gain for the Circuit of Figure 11a High Speed DAC Buffer The AD844 performs very well in applications requiring current-to-voltage conversion. Figure 12 shows connections for use with the AD568 current output DAC. In this application the bipolar offset is used so that the full-scale current is ±5.12 mA, which generates an output of ± 5.12 V usingdecoupling and grounding techniques to achieve the full 12-bit accuracy and realize the fast settling capabilities of the system. The unmarked capacitors in this figure are 0.1 µF ceramic (for the 1 kΩ appli- cation resistor on the AD568. Figure 13 shows the full-scale transient response. Care is needed in power supply example, AVX Type SR305C104KAA), and the ferrite inductors should be about 2.5 µH (for example, Fair-Rite Type 2743002122). The AD568 data sheet should be consulted for more complete details about its use. Applications– |
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