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TPA3000D1PWP Scheda tecnica(PDF) 2 Page - Texas Instruments |
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TPA3000D1PWP Scheda tecnica(HTML) 2 Page - Texas Instruments |
2 / 19 page TPA3000D1 SLOS379A – SEPTEMBER 2001 – REVISED JANUARY 2002 2 www.ti.com AVAILABLE OPTIONS T PACKAGED DEVICES TA TSSOP (PWP)† – 40 °C to 85°C TPA3000D1PWP † The PWP package is available taped and reeled. To order a taped and reeled part, add the suffix R to the part number (e.g., TPA3000D1PWPR). 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 INN INP GAIN0 GAIN1 SHUTDOWN PGND VCLAMP BSN PVCC OUTN OUTN PGND VCC VREF BYPASS COSC ROSC AGND AGND BSP PVCC OUTP OUTP PGND PWP PACKAGE (TOP VIEW) Terminal Functions TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION AGND 18, 19 Analog ground BSN 8 I Bootstrap pin for high-side gate drive of negative BTL output (connect a 10-nF capacitor from OUTN to BSN) BSP 17 I Bootstrap pin for high-side gate drive of positive BTL output (connect a 10-nF capacitor from OUTP to BSP) BYPASS 22 I Connect 0.47 µF capacitor to ground for BYPASS voltage filtering. COSC 21 I Connect a 220-pF capacitor to ground to set oscillation frequency. GAIN0 3 I Bit 0 of gain control (see Table 1 for gain settings) GAIN1 4 I Bit 1 of gain control (see Table 1 for gain settings) INN 1 I Negative differential input INP 2 I Positive differential input OUTN 10, 11 O Negative BTL output OUTP 14, 15 O Positive BTL output PGND 6, 12, 13 Power ground PVCC 9, 16 I High-voltage power supply (for output stages) ROSC 20 I Connect 120 k Ω resistor to ground to set oscillation frequency. SHUTDOWN 5 I Shutdown terminal (negative logic), TTL compatible, 21-V compliant VCC 24 I Analog high-voltage power supply VCLAMP 7 O Connect 100-nF capacitor to ground to provide reference voltage for H-bridge gates VREF 23 O 5-V internal regulator for control circuitry (connect a 0.1- µF to 1-µF capacitor to ground) |
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