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CD74HC85PWR Scheda tecnica(PDF) 1 Page - Texas Instruments

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Il numero della parte CD74HC85PWR
Spiegazioni elettronici  High-Speed CMOS Logic 4-Bit Magnitude Comparator
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Data sheet acquired from Harris Semiconductor
SCHS136E
Features
• Buffered Inputs and Outputs
• Typical Propagation Delay: 13ns (Data to Output at
VCC = 5V, CL = 15pF, TA = 25
oC
• Serial or Parallel Expansion Without External Gating
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30%of VCC at
VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
Pinout
CD54HC85, CD54HCT85 (CERDIP)
CD74HC85 (PDIP, SOIC, SOP, TSSOP)
CD74HCT85 (PDIP, SOIC)
TOP VIEW
Description
The ’HC85 and ’HCT85 are high speed magnitude
comparators that use silicon-gate CMOS technology to
achieve operating speeds similar to LSTTL with the low
power consumption of standard CMOS integrated circuits.
These 4-bit devices compare two binary, BCD, or other
monotonic codes and present the three possible magnitude
results at the outputs (A > B, A < B, and A = B). The 4-bit
input words are weighted (A0 to A3 and B0 to B3), where A3
and B3 are the most significant bits.
The devices are expandable without external gating, in both
serial and parallel fashion. The upper part of the truth table
indicates operation using a single device or devices in a
serially
expanded
application.
The
parallel
expansion
scheme is described by the last three entries in the truth
table.
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
B3
(A < B) IN
(A = B) IN
(A > B) IN
(A > B) OUT
(A = B) OUT
GND
(A < B) OUT
VCC
B2
A2
A1
B1
A0
B0
A3
Ordering Information
PART NUMBER
TEMP. RANGE
(oC)
PACKAGE
CD54HC85F3A
-55 to 125
16 Ld CERDIP
CD54HCT85F3A
-55 to 125
16 Ld CERDIP
CD74HC85E
-55 to 125
16 Ld PDIP
CD74HC85M
-55 to 125
16 Ld SOIC
CD74HC85MT
-55 to 125
16 Ld SOIC
CD74HC85M96
-55 to 125
16 Ld SOIC
CD74HC85NSR
-55 to 125
16 Ld SOP
CD74HC85PW
-55 to 125
16 Ld TSSOP
CD74HC85PWR
-55 to 125
16 Ld TSSOP
CD74HC85PWT
-55 to 125
16 Ld TSSOP
CD74HCT85E
-55 to 125
16 Ld PDIP
CD74HCT85M
-55 to 125
16 Ld SOIC
CD74HCT85MT
-55 to 125
16 Ld SOIC
CD74HCT85M96
-55 to 125
16 Ld SOIC
NOTE: When ordering, use the entire part number. The suffixes 96
and R denote tape and reel. The suffix T denotes a small-quantity
reel of 250.
August 1997 - Revised October 2003
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© 2003, Texas Instruments Incorporated
CD54HC85, CD74HC85,
CD54HCT85, CD74HCT85
High-Speed CMOS Logic
4-Bit Magnitude Comparator
[ /Title
(CD74
HC85,
CD74
HCT85
)
/Sub-
ject
(High
Speed
CMOS
Logic
4-Bit
Magni-
tude
Com-
para-


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