Si5365

Preliminary Rev. 0.34

11

80

95

SFOUT1

SFOUT0

I

3-Level

Signal Format Select.

Three level inputs that select the output signal format (common mode

voltage and differential swing) for all of the clock outputs and CKOUT5.

82

83

CKOUT1–

CKOUT1+

OMULTI

Clock Output 1.

Differential output clock with a frequency specified by FRQSEL and

FRQTBL. Output signal format is selected by SFOUT pins. Output is dif-

ferential for LVPECL, LVDS, and CML compatible modes. For CMOS

format, both output pins drive identical single-ended clock outputs.

85

DBL34

I

LVCMOS

Output 3 and 4 Disable.

Active high input. When active, entire CKOUT3 and CKOUT4 divider

and output buffer path is powered down. CKOUT3 and CKOUT4 outputs

will be in tristate mode during powerdown.

This pin has a weak pull-down.

87

88

CKOUT5–

CKOUT5+

OMULTI

Clock Output 5.

Fifth high-speed clock output with a frequency specified by FRQSEL and

FRQTBL. Output signal format is selected by SFOUT pins. Output is dif-

ferential for LVPECL, LVDS, and CML compatible modes. For CMOS

format, both output pins drive identical single-ended clock outputs.

92

93

CKOUT2+

CKOUT2–

OMULTI

Clock Output 2.

Differential output clock with a frequency specified by FRQSEL and

FRQTBL. Output signal format is selected by SFOUT pins. Output is dif-

ferential for LVPECL, LVDS, and CML compatible modes. For CMOS

format, both output pins drive identical single-ended clock outputs.

97

98

CKOUT4–

CKOUT4+

OMULTI

Clock Output 4.

Differential output clock with a frequency specified by FRQSEL and

FRQTBL settings. Output signal format is selected by SFOUT pins. Out-

put is differential for LVPECL, LVDS, and CML compatible modes. For

CMOS format, both output pins drive identical single-ended clock out-

puts.

GND PAD GND PAD GND

Supply

Ground Pad.

The ground pad must provide a low thermal and electrical impedance to

a ground plane.

Table 3. Si5365 Pin Descriptions (Continued)

Pin #

Pin Name I/O Signal Level

Description

SFOUT[1:0]

Signal Format

HH

Reserved

HM

Reserved

HL

CML

MH

LVPECL

MM

Reserved

ML

LVDS

LH

CMOS

LM

Tristate/Sleep

LL

Reserved