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SI3201-BS Scheda tecnica(PDF) 6 Page - Silicon Laboratories |
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SI3201-BS Scheda tecnica(HTML) 6 Page - Silicon Laboratories |
6 / 118 page Si3215 6 Rev. 0.92 2-Wire Return Loss 200 Hz to 3.4 kHz 30 35 — dB Transhybrid Balance 300 Hz to 3.4 kHz 30 — — dB Noise Performance Idle Channel Noise4 C-Message Weighted — — 15 dBrnC Psophometric Weighted — — –75 dBmP 3 kHz flat — — 18 dBrn PSRR from VDDA RX and TX, DC to 3.4 kHz 40 — — dB PSRR from VDDD RX and TX, DC to 3.4 kHz 40 — — dB PSRR from VBAT RX and TX, DC to 3.4 kHz 40 — — dB Longitudinal Performance Longitudinal to Metallic or PCM Balance 200 Hz to 3.4 kHz, βQ1,Q2 ≥ 150, 1% mismatch 56 60 — dB βQ1,Q2 = 60 to 2405 43 60 — dB βQ1,Q2 = 300 to 8005 53 60 — dB Using Si3201 53 60 — dB Metallic to Longitudinal Balance 200 Hz to 3.4 kHz 40 — — dB Longitudinal Impedance 200 Hz to 3.4 kHz at TIP or RING Register selectable ETBO/ETBA 00 01 10 — — — 33 17 17 — — — Ω Ω Ω Longitudinal Current per Pin Active off-hook 200 Hz to 3.4 kHz Register selectable ETBO/ETBA 00 01 10 — — — 4 8 8 — — — mA mA mA Notes: 1. The input signal level should be 0 dBm0 for frequencies greater than 100 Hz. For 100 Hz and below, the level should be –10 dBm0. The output signal magnitude at any other frequency will be smaller than the maximum value specified. 2. Analog signal measured as VTIP – VRING. Assumes ideal line impedance matching. 3. The quantization errors inherent in the µ3/A-law companding process can generate slightly worse gain tracking performance in the signal range of 3 dB to –37 dB for signal frequencies that are integer divisors of the 8 kHz PCM sampling rate. 4. The level of any unwanted tones within the bandwidth of 0 to 4 kHz does not exceed –55 dBm. 5. Assumes normal distribution of betas. Table 3. AC Characteristics (Continued) (VDDA, VDDD = 3.13 to 5.25 V, TA = 0 to 70 °C for K-Grade, –40 to 85 °C for B-Grade) Parameter Test Condition Min Typ Max Unit |
Codice articolo simile - SI3201-BS |
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