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STAC9758XXTAEYYX Scheda tecnica(PDF) 4 Page - Integrated Device Technology |
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STAC9758XXTAEYYX Scheda tecnica(HTML) 4 Page - Integrated Device Technology |
4 / 119 page STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ PC AUDIO IDT™ 4 STAC9758/9759 V 1.2 1206 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.4.4. Extended Modem Status and Control Register (3Eh) ........................................................82 8.4.5. GPIO Pin Configuration Register (4Ch) ............................................................................. 82 8.4.6. GPIO Pin Polarity/Type Register (4Eh) ............................................................................. 83 8.4.7. GPIO Pin Sticky Register (50h) ......................................................................................... 83 8.4.8. GPIO Pin Mask Register (52h) .......................................................................................... 84 8.4.9. GPIO Pin Status Register (54h) ........................................................................................ 84 8.5. Extended CODEC Registers Page Structure Definition .................................................................. 85 8.5.1. Extended Registers Page 00 ............................................................................................. 85 8.5.2. Extended Registers Page 01 ............................................................................................. 85 8.5.3. Extended Registers Page 02, 03 ....................................................................................... 85 8.6. STAC9758/9759 Paging Registers ................................................................................................. 85 8.6.1. SPDIF_In Status 1 Register (60h, Page 00h) ..................................................................... 86 8.6.2. CODEC Class/Rev (60h Page 01h) .................................................................................... 86 8.6.3. SPDIF_In Status 2 Register (62h, Page 00h) ..................................................................... 87 8.6.4. PCI SVID (62h Page 01h) ................................................................................................... 88 8.6.5. Universal Jack TM Output Select (64h, Page 00h) ............................................................... 88 8.6.6. PCI SSID (64h Page 01h) ................................................................................................... 89 8.6.7. Universal JackTM Input Select (66h, Page 00h) .................................................................. 90 8.6.8. Function Select (66h Page 01h) .......................................................................................... 91 8.6.9. I/O Misc. (68h, Page 00h) ................................................................................................... 92 8.6.10. Function Information (68h Page 01h) ................................................................................ 93 8.6.11. Digital Audio Control (6Ah, Page 00h) .............................................................................. 95 8.6.12. Sense Details (6Ah Page 01h ) .......................................................................................... 96 8.6.13. Revision Code (6Ch, Page 00h) ........................................................................................ 97 8.6.14. DAC Slot Mapping (6Ch, Page 01h) ................................................................................. 97 8.6.15. Analog Special (6Eh, Page 00h) ....................................................................................... 98 8.6.16. ADC Slot Mapping (6Eh, Page 01h) ................................................................................ 100 8.6.17. IDT Reserved (70h) ....................................................................................................... 100 8.6.18. Various Functions (72h) ................................................................................................ 100 8.6.19. EAPD Access Register (74h) ........................................................................................ 102 8.6.20. Analog Misc. (76h) ......................................................................................................... 103 8.6.21. ADAT Control and HPF Bypass (78h) ........................................................................... 103 8.6.22. IDT Reserved Register (7Ah) ........................................................................................ 103 8.7. Vendor ID1 and ID2 (7Ch and 7Eh) .............................................................................................. 104 8.7.1. Vendor ID1 (7Ch) ............................................................................................................ 104 8.7.2. Vendor ID2 (7Eh) ............................................................................................................. 104 9. LOW POWER MODES .......................................................................................................... 105 10. MULTIPLE CODEC SUPPORT ........................................................................................... 107 10.1. Primary/Secondary CODEC Selection ........................................................................................ 107 10.1.1. Primary CODEC Operation ........................................................................................... 107 10.1.2. Secondary CODEC Operation ....................................................................................... 107 10.2. Secondary CODEC Register Access Definitions ......................................................................... 108 11. TESTABILITY ...................................................................................................................... 109 11.1. ATE Test Mode ........................................................................................................................... 109 12. PIN DESCRIPTION .............................................................................................................. 110 12.1. Digital I/O ..................................................................................................................................... 110 12.2. Analog I/O ................................................................................................................................... 111 12.3. Filter/References ......................................................................................................................... 112 12.4. Power and Ground Signals ......................................................................................................... 112 13. ORDERING INFORMATION ................................................................................................ 113 14. PACKAGE DRAWING ......................................................................................................... 113 15. 48-PIN LQFP SOLDER REFLOW PROFILE ....................................................................... 114 15.1. Standard Reflow Profile Data ...................................................................................................... 114 15.2. Pb Free Process - Package Classification Reflow Temperatures ............................................... 115 |
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