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STAC9750 Scheda tecnica(PDF) 2 Page - Integrated Device Technology |
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STAC9750 Scheda tecnica(HTML) 2 Page - Integrated Device Technology |
2 / 73 page STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS PC AUDIO IDT™ 2 STAC9750/9751 V 5.8 103106 VALUE-LINE TWO-CHANNEL AC’97 CODECS TABLE OF CONTENTS 1. PRODUCT BRIEF ...................................................................................................................... 5 1.1. Features ............................................................................................................................................ 5 1.2. Description ........................................................................................................................................ 5 1.3. STAC9750/9751 Block Diagram ........................................................................................................ 6 1.4. Key Specifications ............................................................................................................................. 7 1.5. Related Materials .............................................................................................................................. 7 1.6. Additional Support ............................................................................................................................. 7 2. CHARACTERISTICS/SPECIFICATIONS .................................................................................. 8 2.1. Electrical Specifications ..................................................................................................................... 8 2.2. AC Timing Characteristics ............................................................................................................... 15 3. TYPICAL CONNECTION DIAGRAM ....................................................................................... 19 4. AC-LINK ................................................................................................................................... 20 4.1. Clocking ........................................................................................................................................... 20 4.2. Reset ............................................................................................................................................... 20 5. DIGITAL INTERFACE .............................................................................................................. 21 5.1. AC-Link Digital Serial Interface Protocol ......................................................................................... 21 5.2. AC-Link Low Power Mode ............................................................................................................... 29 5.3. Waking up the AC-Link .................................................................................................................... 30 6. STAC9750/9751 MIXER .......................................................................................................... 31 6.1. Analog Mixer Input .......................................................................................................................... 33 6.2. Analog Mixer Output ........................................................................................................................ 33 6.3. SPDIF Digital Mux ........................................................................................................................... 33 6.4. PC Beep Implementation ................................................................................................................ 33 6.5. Programming Registers ................................................................................................................... 34 7. LOW POWER MODES ............................................................................................................ 56 8. MULTIPLE CODEC SUPPORT ............................................................................................... 58 8.1. Primary/Secondary CODEC Selection ............................................................................................ 58 8.2. Secondary CODEC Register Access Definitions ............................................................................. 59 9. TESTABILITY .......................................................................................................................... 60 10. PIN DESCRIPTION ................................................................................................................ 61 10.1. Digital I/O ....................................................................................................................................... 62 10.2. Analog I/O ..................................................................................................................................... 63 10.3. Filter/References/GPIO ................................................................................................................. 64 10.4. Power and Ground Signals ........................................................................................................... 64 11. ORDERING INFORMATION .................................................................................................. 65 12. PACKAGE DRAWINGS ......................................................................................................... 66 12.1. 48-Pin LQFP .................................................................................................................................. 66 13. SOLDER REFLOW PROFILE ............................................................................................... 67 13.1. Standard Reflow Profile Data ........................................................................................................ 67 13.2. Pb Free Process - Package Classification Reflow Temperatures ................................................. 68 14. APPENDIX A: SPLIT INDEPENDENT POWER SUPPLY OPERATION .............................. 69 15. APPENDIX B: PROGRAMMING REGISTERS ..................................................................... 71 16. REVISION HISTORY ............................................................................................................. 72 |
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