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74CBTLV1G125GW Scheda tecnica(PDF) 11 Page - NXP Semiconductors |
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74CBTLV1G125GW Scheda tecnica(HTML) 11 Page - NXP Semiconductors |
11 / 18 page 74CBTLV1G125 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 2 February 2007 11 of 18 NXP Semiconductors 74CBTLV1G125 Single bus switch Test data is given in Table 12. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = Test voltage for switching times. Fig 13. Load circuitry for switching times VEXT VCC VI VO mna616 DUT CL RT RL RL PULSE GENERATOR Table 12. Test data Supply voltage Load VEXT VCC CL tPLH, tPHL tPZH, tPHZ tPZL, tPLZ 2.3 V to 2.7 V 30 pF open GND 2 × VCC 3.0 V to 3.6 V 50 pF open GND 2 × VCC |
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