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TEA1210TS Scheda tecnica(PDF) 3 Page - NXP Semiconductors |
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TEA1210TS Scheda tecnica(HTML) 3 Page - NXP Semiconductors |
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3 / 20 page  1999 Mar 08 3 Philips Semiconductors Preliminary specification High efficiency, high current DC/DC converter TEA1210TS QUICK REFERENCE DATA Tamb = −40 to +80 °C; all voltages measured with respect to ground; positive currents flow into the IC; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Voltage levels UPCONVERSION; pin U/D = LOW VI input voltage VI(start) − 5.50 V VO output voltage 2.90 − 5.50 V VI(start) start-up input voltage IL < 200 mA 1.20 1.60 1.85 V VI(uvlo) undervoltage lockout input voltage 1.50 2.10 2.70 V DOWNCONVERSION; pin U/D = HIGH VI input voltage 2.90 − 5.50 V VO output voltage 1.30 − 5.50 V GENERAL Vfb feedback input voltage 1.20 1.25 1.30 V ∆V window output voltage window PWM mode 1.5 2.0 3.0 % Current levels Iq quiescent current on pins LX VI =2.40 V; VO = 3.60 V 100 125 150 µA Ishdwn current in shut-down mode − 210 µA ∆I lim(up) current limit deviation in up mode Ilim(up) set to 2.0 A −12 − +12 % Ilim(down) current limit in down mode 4.8 A ILX maximum continuous current on pins LX Tamb =60 °C −− 1.8 A Power MOSFETs RDSon(N) drain-to-source on-state resistance NFET Tj =27 °C − 56 63 m Ω RDSon(P) drain-to-source on-state resistance PFET Tj =27 °C − 68 77 m Ω Efficiency η efficiency upconversion VI = 2.4 V; VO = 3.6 V; Tamb =20 °C IL =1mA 83 86 − % IL = 100 mA 90 93 − % IL = 500 mA 92 94 − % IL = 1.5 A; not continual 84 86 − % Timing fsw switching frequency PWM mode 480 600 720 kHz fsync synchronization clock input frequency 9 13 20 MHz tres response time from standby to Po(max) − 25 −µs |
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