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TDA8784HL Scheda tecnica(PDF) 10 Page - NXP Semiconductors |
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TDA8784HL Scheda tecnica(HTML) 10 Page - NXP Semiconductors |
10 / 28 page 1999 Sep 21 10 Philips Semiconductors Product specification 18 Msps, 10-bit analog-to-digital interface for CCD cameras TDA8784 Clamps gm(ADC) ADC clamp transconductance at clamp level − 7 − mS gm(CDS) CDS clamp transconductance at clamp level − 1.5 − mS Analog-to-Digital Converter (ADC) fCLK(max) maximum clock frequency 18 −− MHz tCPH clock pulse width HIGH 15 −− ns tCPL clock pulse width LOW 15 −− ns SRCLK clock input slew rate (rising and falling edge) 10% to 90% 0.5 −− V/ns Vi(ADC)(p-p) ADC input voltage level (peak-to-peak value) − 2 − V VRB ADC reference voltage output code 0 − 1.5 − V VRT ADC reference voltage output code 1023 − 3.5 − V IADCIN input current pin 10 −2 − +120 µA INL integral non-linearity ramp input −±0.6 ±1.5 LSB DNL differential non-linearity ramp input −±0.2 ±0.75 LSB td(s) sampling delay time −− 5ns Total chain characteristics (CDS + AGC + ADC) td time delay between SHD and CLK see Fig.5; 50% at rising edges CLK and SHP: transition full scale code 0 to 1023; fcut(CDS) = 40 MHz; fcut(AGC) = 40 MHz; Vi(CDS) = 1200 mV − 40 − ns Ntot(rms) total output noise (RMS value) fcut(CDS) = 120 MHz; fcut(AGC) = 40 MHz; note 1 GAGC = 4.5 dB − 0.125 − LSB GAGC = 34.5 dB − 1.6 − LSB Voffset(fl-d) maximum offset between CCD floating level and CCD dark pixel level −200 − +200 mV Vn(i)(eq)(rms) equivalent input noise voltage (RMS value) AGC gain = 34.5 dB − 125 −µV AGC gain = 4.5 dB − 150 −µV Digital-to-analog converter (OFDOUT) VOFDOUT(p-p) additional 8-bit control DAC (OFD) output voltage (peak-to-peak value) − 1.4 − V VOFDOUT(0) DC output voltage for code 0 − 2.3 − V VOFDOUT(255) DC output voltage for code 255 − 3.7 − V SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT |
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