1995 Dec 15

3

Philips Semiconductors

Product specification

Dual common-mode rejection differential

line receiver

TDA8578

BLOCK DIAGRAM

Fig.1 Block diagram.

MBD209

TDA8578

VCC

12

8

11

1

5

6

7

9

16

V

CC

GND

INR

INR

INL

INL

OUTL

SVRR

OUTR

FUNCTIONAL DESCRIPTION

The TDA8578 contains two identical differential amplifiers

with a voltage gain of 0 dB. The device is intended to

receive line input signals. The device has a very high-level

of common-mode rejection and it eliminates ground noise.

The common-mode rejection keeps constant up to high

frequencies. The gain of the amplifiers is fixed at 0 dB. The

inputs have a high-input impedance and the output stage

is a class AB stage with a low-output impedance. For a

large common-mode rejection also at low frequencies, an

electrolytic input capacitor at the negative input pin is

advised. The input impedance is relative high, this would

result in a large settling time of the DC input voltage.

Therefore a quick charge circuit is included that charges

the input capacitor within 0.2 s.

All input and output pins are protected against high

electrostatic discharge conditions (4000 V, 150 pF, 150

Ω).

PINNING

SYMBOL

PIN

DESCRIPTION

INL+

1

positive input left

n.c.

2

not connected

n.c.

3

not connected

n.c.

4

not connected

INL

−

5

negative input left

INR

−

6

negative input right

INR+

7

positive input right

SVRR

8

half supply voltage

GND

9

ground

n.c.

10

not connected

OUTR

11

output right

OUTL

12

output left

n.c.

13

not connected

n.c.

14

not connected

n.c.

15

not connected

16

supply voltage

Fig.2 Pin configuration.

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

TDA8578

GND

INR

INR

INL

INL

OUTL

SVRR

OUTR

n.c.

n.c.

n.c.

n.c.

n.c.

n.c.

n.c.

V CC

MBD210