Motore di ricerca datesheet componenti elettronici |
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TSA1204 Scheda tecnica(PDF) 6 Page - STMicroelectronics |
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TSA1204 Scheda tecnica(HTML) 6 Page - STMicroelectronics |
6 / 31 page Dynamic characteristics TSA1204 6/31 3 Dynamic characteristics Dynamic characteristics are measured at AVCC = DVCC = VCCB = 2.5 V, FS= 20 Msps, Fin=10.5 MHz, Vin@ -1 dBFS, VREFP=1.0 V, VREFM=0 V and Tamb = 25° C (unless otherwise specified). 4 Timing characteristics Timing characteristics are measured at AVCC = DVCC = VCCB = 2.5 V, FS= 20 Msps, Fin=10.5 MHz, Vin@ -1 dBFS, VREFP=1.0 V, VREFM=0 V and Tamb = 25° C (unless otherwise specified). Table 2. Dynamic characteristics Symbol Parameter Test conditions Min Typ Max Unit SFDR Spurious free dynamic range -81.5 -71.0 dBc SNR Signal to noise ratio 66.9 68.5 dB THD Total harmonics distortion -80 -70 dBc SINAD Signal to noise and distortion ratio 64.8 68 dB ENOB Effective number of bits 10.6 11.2 bits Table 3. Timing characteristics Symbol Parameter Test conditions Min Typ Max Unit FS Sampling frequency 0.5 20 MHz DC Clock duty cycle 45 50 55 % TC1 Clock pulse width (high) 22.5 25 ns TC2 Clock pulse width (low) 22.5 25 ns Tod Data output delay (clock edge to data valid) 10 pF load capacitance 9ns Tpd I Data pipeline delay for channel I 7 cycle s Tpd Q Data pipeline delay for channel Q 7.5 cycle s Ton Falling edge of OEB to digital output valid data 1ns Toff Rising edge of OEB to digital output tri-state 1ns |
Codice articolo simile - TSA1204_06 |
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Descrizione simile - TSA1204_06 |
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