74LVC594A_1

© NXP B.V. 2007. All rights reserved.

Product data sheet

Rev. 01 — 24 May 2007

11 of 19

NXP Semiconductors

74LVC594A

8-bit shift register with output register

Measurement points are given in Table 8.

The shaded areas indicate when the input is permitted to change for predictable output performance.

Fig 9.

The data set-up and hold times for the serial data input (DS)

mna560

GND

GND

Q

7S output

SH

CP input

D

S input

Measurement points are given in Table 8.

Fig 10. The shift reset (SHR) to storage clock (STCP) set-up times

mbc326

STCP input

Q

n outputs

SHR input