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TSC2046E Scheda tecnica(PDF) 9 Page - Burr-Brown (TI) |
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TSC2046E Scheda tecnica(HTML) 9 Page - Burr-Brown (TI) |
9 / 30 page TSC2046E SBAS417 − JUNE 2007 www.ti.com 9 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, +VCC = +2.7V, IOVDD = +1.8V, VREF = External +2.5V, 12-bit mode, PD0 = 0, fSAMPLE = 125kHz, and fCLK = 16 • fSAMPLE = 2MHz, unless otherwise noted. TEMP1 DIODE VOLTAGE vs +V CC 2.7 3.0 3.3 +V CC (V) 720 718 716 714 712 710 THEORY OF OPERATION The TSC2046E is a classic successive approximation register (SAR) analog-to-digital converter (ADC). The architecture is based on capacitive redistribution, which inherently includes a sample-and-hold function. The converter is fabricated on a 0.6 µm CMOS process. The basic operation of the TSC2046E is shown in Figure 1. The device features an internal 2.5V reference and uses an external clock. Operation is maintained from a single supply of 2.7V to 5.25V. The internal reference can be overdriven with an external, low-impedance source between 1V and +VCC. The value of the reference voltage directly sets the input range of the converter. The analog input (X-, Y-, and Z-Position coordinates, auxiliary input, battery voltage, and chip temperature) to the converter is provided via a multiplexer. A unique configuration of low on-resistance touch panel driver switches allows an unselected ADC input channel to provide power and the accompanying pin to provide ground for an external device, such as a touch screen. By maintaining a differential input to the converter and a differential reference architecture, it is possible to negate the error from each touch panel driver switch’s on-resistance (if this is a source of error for the particular measurement). +V CC +V CC X+ Y+ X − Y − V BAT AUX B1 C1 D1 E1 G2 G3 G6 E7 G4 G5 A2 A3 A4 A5 A6 B7 C7 D7 DCLK CS DIN BUSY DOUT PENIRQ IOVDD V REF Serial/Conversion Clock Chip Select Serial Data In Converter Status Serial Data Out + 1 µF to 10 µF (Optional) +2.7V to +5V TSC2046E Auxiliary Input To Battery Voltage Regulator Touch Screen 0.1 µF Pen Interrupt GND GND NOTE: VFBGA package and pin names shown. Figure 1. Basic Operation of the TSC2046E |
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