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SL1ICS3101U Scheda tecnica(PDF) 10 Page - NXP Semiconductors

Il numero della parte SL1ICS3101U
Spiegazioni elettronici  I.CODE1 Label IC 97pF Chip Specification
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Produttore elettronici  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

SL1ICS3101U Scheda tecnica(HTML) 10 Page - NXP Semiconductors

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Product Specification
SL1 ICS31 01
Rev. 1.2
July 2000
Page 10 of 22
Public
7 Mechanical Wafer Specifications
For further information as described in the following chapters please refer to the following
Philips documents:
• Dicing Guidelines for Thin Wafers (< 200 µm)
• General Specification for 6” Wafer
In case of doubt or inconsistency with the following chapters the above mentioned specifications
are applicable.
Designation:
each wafer is laser scribed with batch and wafer number
Wafer diameter:
150 mm (6")
± 0.3 mm
Die separation lane width:
80 µm (Scribe line)
Electrical connection of substrate:
VSS
Geometrically complete dies per wafer:
approx. 7400
Orientation of dies relat. to wafer flat:
see attached cluster map
Position of test structures:
see attached cluster map
Wafer layout:
see attached cluster map
Batch size:
24 wafers
Process:
6C15 IDFW
7.1 Wafer Status
• Tested, unsawn
• Tested, sawn on FFC
Minimum yield per lot:
30 %
7.2 Backside Treatment
Wafers can be delivered with a thickness of 525 µm (untreated) or with 150
µm ± 15 µm (approx.
6 mil) and have a ground and etched backside.


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