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MC34923DWR2 Scheda tecnica(PDF) 3 Page - Freescale Semiconductor, Inc |
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MC34923DWR2 Scheda tecnica(HTML) 3 Page - Freescale Semiconductor, Inc |
3 / 16 page MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 34923 3 . PIN FUNCTION DESCRIPTION Pin Pin Name Formal Name Definition 1VB Boost Voltage Boost voltage storage node. 2 CP2 Switching Capacitor 2 Charge pump capacitor connection 2. 3 CP1 Switching Capacitor 1 Charge pump capacitor connection 1. 4 DIR Direction Logic-level input for direction control. 5 OSC Oscillator Logic-level oscillator (square wave) input. 6, 7, 18, 19 GND Ground Ground. 8VDD Logic Voltage Low voltage (typically 5.0 V) logic supply. 9 PWM/ENABLE H-Bridge Enable Logic-level input for enabling the H-bridge driver. 10 DATA Serial Data Logic-level input for serial interface. 11 CLOCK Serial Data Clock Logic-level input for serial port (data is entered on rising edge). 12 STROBE Serial Data Latch Strobe Logic-level input for serial port (active on rising edge). 13 VREF Current Limit Reference Voltage Load current reference input voltage. 14 PWMMODE PWM Mode Control Logic-level input for PWM mode control when in internal PWM mode. 15, 22 NC No Connect No internal connection to this pin. 16 DCMA H-Bridge Output A One of two bridge outputs to the motor. 17 SENSE Current Sense Sense resistor. 20 VBB H-Bridge Voltage Supply High-current (20 V to 45 V) load supply. 21 DCMB H-Bridge Output B One of two bridge outputs to the motor. 23 SPAN Current Limit Reference Range Logic-level input for VREF range control. 24 VREG Bandgap Voltage Bandgap decoupling capacitor. 5 6 7 8 9 10 11 12 2 3 4 24 20 19 18 17 16 15 13 23 22 21 14 1 VREG VBB GND GND SENSE DCMA NC PWMMODE VREF SPAN NC DCMB VB OSC GND GND VDD PWM/ENABLE DATA STROBE CP2 CP1 DIR CLOCK Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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