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LS7535FT Scheda tecnica(PDF) 5 Page - LSI Computer Systems |
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LS7535FT Scheda tecnica(HTML) 5 Page - LSI Computer Systems |
5 / 8 page TRIG OUTPUT DRIVER DIGITAL COM- PARATOR BRIGHTNESS MEMORY Ø POINTER PHASE LOCK LOOP CONTROL LOGIC BUF BUF BUF BUF SYNC CAP DOZE DOWN UP (+V) (-V) FIGURE 4 LS7534/LS7535 BLOCK DIAGRAM 4 3 2 6 5 1 7 8 VSS VDD APPLICATION EXAMPLES: Typical dimmer light switch circuit schematics are shown in Fig. 5A (LS7534) and Fig. 5B (LS7535). The brightness of the lamp is set by touching the UP and DOWN touch plates in Fig. 5A and closure of the UP and DOWN switches in Fig. 5B. The functions of different components are as follows: • Z, D1, R1, C2 and C5 produce the 15V DC supply for the chip. • R2 and C4 filter and current limit the AC signal for the SYNC input. • C3 is the filter capacitor for the internal PLL. • C1 and L are RFI filters. • In Fig. 5A, R3 and R4 set the touch sensitivity of the UP and DOWN inputs. • In Fig. 5B, R3 limits the current between Vss and the UP and DOWN inputs upon closure of a switch. • The resistor and diode connected between the chip output and the triac gate provides current limiting and isolation for the chip. The resistor is R5 in Fig. 5A and R4 in Fig. 5B. • In Fig. 5B, PCB layout may cause triac switching transients to be coupled to the Up or Down input which can have the effect of having a Long switch closure “lock-up” at a certain phase angle output. In this case, capacitors C6 and C7 must be added as shown. The information included herein is believed to be accurate and reliable. However, LSI Computer Systems, Inc. assumes no responsibilities for inaccuracies, nor for any infringements of patent rights of others which may result from its use. 7535-012703-5 |
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