Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

AD7840ARS Scheda tecnica(PDF) 6 Page - Analog Devices

Il numero della parte AD7840ARS
Spiegazioni elettronici  LC2MOS Complete 14-Bit DAC
Download  16 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

AD7840ARS Scheda tecnica(HTML) 6 Page - Analog Devices

Back Button AD7840ARS Datasheet HTML 2Page - Analog Devices AD7840ARS Datasheet HTML 3Page - Analog Devices AD7840ARS Datasheet HTML 4Page - Analog Devices AD7840ARS Datasheet HTML 5Page - Analog Devices AD7840ARS Datasheet HTML 6Page - Analog Devices AD7840ARS Datasheet HTML 7Page - Analog Devices AD7840ARS Datasheet HTML 8Page - Analog Devices AD7840ARS Datasheet HTML 9Page - Analog Devices AD7840ARS Datasheet HTML 10Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 16 page
background image
AD7840
REV. B
–6–
OP AMP SECTION
The output from the voltage mode DAC is buffered by a
noninverting amplifier. Internal scaling resistors on the AD7840
configure an output voltage range of
±3 V for an input reference
voltage of +3 V. The arrangement of these resistors around the
output op amp is as shown in Figure 1. The buffer amplifier is
capable of developing
±3 V across a 2 kΩ and 100 pF load to
ground and can produce 6 V peak-to-peak sine wave signals to a
frequency of 20 kHz. The output is updated on the falling edge
of the LDAC input. The amplifier settles to within 1/2 LSB of
its final value in typically less than 2.5
µs.
The small signal (200 mV p-p) bandwidth of the output buffer
amplifier is typically 1 MHz. The output noise from the ampli-
fier is low with a figure of 30 nV/
√Hz at a frequency of 1 kHz.
The broadband noise from the amplifier exhibits a typical peak-
to-peak figure of 150
µV for a 1 MHz output bandwidth. Figure
4 shows a typical plot of noise spectral density versus frequency
for the output buffer amplifier and for the on-chip reference.
Figure 4. Noise Spectral Density vs. Frequency
TRANSFER FUNCTION
The basic circuit configuration for the AD7840 is shown in Fig-
ure 5. Table II shows the ideal input code to output voltage re-
lationship for this configuration. Input coding to the DAC is 2s
complement with 1 LSB = FS/16,384 = 6 V/16,384 = 366
µV.
Figure 5. AD7840 Basic Connection Diagram
Table II. Ideal Input/Output Code Table
DAC Latch Contents
MSB
LSB
Analog Output, VOUT*
0 1 1 1 1 1 1 1 1 1 1 1 1 1
+2.999634 V
0 1 1 1 1 1 1 1 1 1 1 1 1 0
+2.999268 V
0 0 0 0 0 0 0 0 0 0 0 0 0 1
+0.000366 V
0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 V
1 1 1 1 1 1 1 1 1 1 1 1 1 1
–0.000366 V
1 0 0 0 0 0 0 0 0 0 0 0 0 1
–2.999634 V
1 0 0 0 0 0 0 0 0 0 0 0 0 0
–3 V
*Assuming REF IN = +3 V.
The output voltage can be expressed in terms of the input code,
N, using the following expression:
V
OUT =
2
× N × REFIN
16384
− 8192 ≤ N ≤+8191
INTERFACE LOGIC INFORMATION
The AD7840 contains two 14-bit latches, an input latch and a
DAC latch. Data can be loaded to the input latch in one of two
basic interface formats. The first is a parallel 14-bit wide data
word; the second is a serial interface where 16 bits of data are
serially clocked into the input latch. In the parallel mode, CS
and WR control the loading of data. When the serial data format
is selected, data is loaded using the SCLK, SYNC and SDATA
serial inputs. Data is transferred from the input latch to the
DAC latch under control of the LDAC signal. Only the data in
the DAC latch determines the analog output of the AD7840.
Parallel Data Format
Table III shows the truth table for AD7840 parallel mode op-
eration. The AD7840 normally operates with a parallel input
data format. In this case, all 14 bits of data (appearing on data
inputs D13 (MSB) through D0 (LSB)) are loaded to the
AD7840 input latch at the same time. CS and WR control the
loading of this data. These control signals are level-triggered;
therefore, the input latch can be made transparent by holding
both signals at a logic low level. Input data is latched into the in-
put latch on the rising edge of CS or WR.
The DAC latch is also level triggered. The DAC output is nor-
mally updated on the falling edge of the LDAC signal. However,
both latches cannot become transparent at the same time.
Therefore, if LDAC is hardwired low, the part operates as fol-
lows; with LDAC low and CS and WR high, the DAC latch is
transparent. When CS and WR go low (with LDAC still low),
the input latch becomes transparent but the DAC latch is dis-
abled. When CS or WR return high, the input latch is locked
out and the DAC latch becomes transparent again and the DAC
output is updated. The write cycle timing diagram for parallel
data is shown in Figure 6. Figure 7 shows the simplified parallel
input control logic for the AD7840.


Codice articolo simile - AD7840ARS

Produttore elettroniciIl numero della parteScheda tecnicaSpiegazioni elettronici
logo
Analog Devices
AD7840 AD-AD7840_15 Datasheet
339Kb / 16P
   LC MOS Complete 14-Bit DAC
REV. B
More results

Descrizione simile - AD7840ARS

Produttore elettroniciIl numero della parteScheda tecnicaSpiegazioni elettronici
logo
Analog Devices
AD7845 AD-AD7845 Datasheet
195Kb / 12P
   LC2MOS Complete 12-Bit Multiplying DAC
REV. B
AD7836 AD-AD7836 Datasheet
174Kb / 12P
   LC2MOS Quad 14-Bit DAC
REV. A
AD7834 AD-AD7834 Datasheet
404Kb / 16P
   LC2MOS Quad 14-Bit DAC
REV. A
AD7836ASZ AD-AD7836ASZ Datasheet
176Kb / 12P
   LC2MOS Quad 14-Bit DAC
REV. A
AD7872KRZ-REEL AD-AD7872KRZ-REEL Datasheet
324Kb / 16P
   LC2MOS Complete 14-Bit, Sampling ADCs
REV. D
AD7871 AD-AD7871 Datasheet
344Kb / 16P
   LC2MOS Complete 14-Bit, Sampling ADCs
REV. D
AD7872JRZ AD-AD7872JRZ Datasheet
267Kb / 16P
   LC2MOS Complete 14-Bit, Sampling ADCs
REV. D
AD7538JRZ AD-AD7538JRZ Datasheet
306Kb / 16P
   LC2MOS Microprocessor-Compatible 14-Bit DAC
REV. B
AD7535 AD-AD7535 Datasheet
496Kb / 12P
   LC2MOS uP-COMPATIBLE 14-BIT DAC
REV. A
AD7536 AD-AD7536 Datasheet
620Kb / 12P
   LC2MOS 14-BIT uP-COMPATIBLE DAC
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16


Scheda tecnica Scarica

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEETIT.COM
Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com