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SN74ABT646APWE4 Scheda tecnica(PDF) 4 Page - Texas Instruments |
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SN74ABT646APWE4 Scheda tecnica(HTML) 4 Page - Texas Instruments |
4 / 24 page SN54ABT646A, SN74ABT646A OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3STATE OUTPUTS SCBS069H − JULY 1991 − REVISED MAY 2004 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 FUNCTION TABLE INPUTS DATA I/Os OPERATION OR FUNCTION OE DIR CLKAB CLKBA SAB SBA A1−A8 B1−B8 OPERATION OR FUNCTION X X ↑ X X X Input Unspecified† Store A, B unspecified† X XX ↑ X X Unspecified† Input Store B, A unspecified† H X ↑ ↑ X X Input Input Store A and B data H X H or L H or L X X Input disabled Input disabled Isolation, hold storage L L X X X L Output Input Real-time B data to A bus L L X H or L X H Output Input Stored B data to A bus L H X X L X Input Output Real-time A data to B bus L H H or L X H X Input Output Stored A data to B bus † The data-output functions can be enabled or disabled by various signals at OE and DIR. Data-input functions always are enabled, i.e., data at the bus terminals is stored on every low-to-high transition of the clock inputs. logic diagram (positive logic) A1 B1 One of Eight Channels SAB CLKAB SBA CLKBA DIR OE To Seven Other Channels Pin numbers shown are for the DB, DGV, DW, JT, NS, NT, PW, and W packages. 21 3 23 22 1 2 4 20 1D C1 1D C1 |
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