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74VHCT374A Scheda tecnica(PDF) 5 Page - Fairchild Semiconductor |
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74VHCT374A Scheda tecnica(HTML) 5 Page - Fairchild Semiconductor |
5 / 9 page ©1997 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHCT374A Rev. 1.3 5 AC Electrical Characteristics Notes: 7. Parameter guaranteed by design. tOSLH = |tPLH max – tPLH min|; tOSHL = |tPHL max – tPHL min| 8. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (Opr.) = CPD • VCC • fIN + ICC / 8 (per F/F). The total CPD when n pcs. of the octal D Flip-Flop operates can be calculated by the equation: CPD(total) = 20 + 12m AC Operating Requirements Symbol Parameter VCC (V) Conditions TA = 25°C TA = –40°C to +85°C Units Min. Typ. Max. Min. Max. tPLH, tPHL Propagation Delay Time 5.0 ± 0.5 CL = 15pF 4.1 9.4 1.0 10.5 ns CL = 50pF 5.6 10.4 1.0 11.5 tPZL, tPZH 3-STATE Output Enable Time 5.0 ± 0.5 RL = 1kΩ CL = 15pF 6.5 10.2 1.0 11.5 ns CL = 50pF 7.3 11.2 1.0 12.5 tPLZ, tPHZ 3-STATE Output Disable Time 5.0 ± 0.5 RL = 1kΩ CL = 50pF 7.0 11.2 1.0 12.0 ns tOSLH, tOSHL Output to Output Skew 5.0 ± 0.5 (7) 1.0 1.0 ns fMAX Maximum Clock Frequency 5.0 ± 0.5 CL = 15pF 90 140 80 MHz CL = 50pF 85 130 75 CIN Input Capacitance VCC = Open 4 10 10 pF COUT Output Capacitance VCC = 5.0V 9 pF CPD Power Dissipation Capacitance (8) 25 pF Symbol Parameter VCC (V) TA = 25°C TA = –40°C to +85°C Units Min. Typ. Max. Min. Max. tW(H), tW(L) Minimum Pulse Width (CP) 5.0 ± 0.5 6.5 8.5 ns tS Minimum Set-up Time 5.0 ± 0.5 2.5 2.5 ns tH Minimum Hold Time 5.0 ± 0.5 2.5 2.5 ns |
Codice articolo simile - 74VHCT374A_07 |
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Descrizione simile - 74VHCT374A_07 |
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