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FM50S3X_NL Scheda tecnica(PDF) 4 Page - Fairchild Semiconductor |
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FM50S3X_NL Scheda tecnica(HTML) 4 Page - Fairchild Semiconductor |
4 / 8 page FM50 PRODUCT SPECIFICATION 4 REV. 1.1.0 10/5/04 Typical Performance Characteristics Figure 1. Accuracy vs. Temperature Figure 2. Typical IDD versus Temperature Figure 3. Typical Sensitivity to Supply Voltage -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0 -50 150 50 0 100 upper spec limit lower spec limit VDD = +5V Temperature (°C) -1.0 0.0 1.0 2.0 3.0 4.0 5.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 VDD Volts 0.0 20.0 40.0 60.0 80.0 100.0 120.0 140.0 -50 -30 -10 10 30 50 70 90 110 130 Temperature ( °C) Description Within the FM50 are a thermal diode, calibration circuits and amplifiers. Since the FM50 is calibrated at 33°C, the nominal output in mV is: where T is the thermal junction temperature expressed in °C. At 33°C, the tolerances are as follows: 1. Offset is ±3mV 2. Slope, ±0.3mV/°C These values accommodate the specified accuracies at -40, 25 and +125°C. Output structure of the FM50 is an n-channel CMOS transis- tor driving a p-channel load. Available current is typically 50 µA to ground. Series resistance is typically 7 k Ω, charging and 2 k Ω, discharging through a capacitor connected from VOUT to ground. Following application of power to VDD, VOUT is accurate following a delay of approximately 80 msec. V OUT 830 10 T 33 – () • + = |
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