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ISL22349WFV14Z Scheda tecnica(PDF) 2 Page - Intersil Corporation |
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ISL22349WFV14Z Scheda tecnica(HTML) 2 Page - Intersil Corporation |
2 / 12 page 2 FN6331.2 September 15, 2006 Block Diagram I2C INTERFACE VCC GND RW0 RW1 RW2 RW3 SCL SDA A0 A1 A2 WR3 WR2 WR1 WR0 SHDN VCC VCC VCC VCC POWER-UP INTERFACE, CONTROL AND STATUS LOGIC NON- VOLATILE REGISTERS Pin Descriptions TSSOP PIN SYMBOL DESCRIPTION 1 RW3 “Wiper” terminal of DCP3 2 A2 Device address input for the I2C interface 3 SCL Open drain I2C interface clock input 4 SDA Open drain serial data I/O for the I2C interface 5 GND Device ground pin and the RL connection for each DCP 6 RW2 “Wiper” terminal of DCP2 7 RW1 “Wiper” terminal of DCP1 8NC 9 A0 Device address input for the I2C interface 10 A1 Device address input for the I2C interface 11 NC 12 VCC Power supply pin and the RH connection for each DCP 13 SHDN Shutdown active low input 14 RW0 “Wiper” terminal of DCP0 ISL22349 |
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