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FAN1582D15X Scheda tecnica(PDF) 7 Page - Fairchild Semiconductor |
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FAN1582D15X Scheda tecnica(HTML) 7 Page - Fairchild Semiconductor |
7 / 11 page PRODUCT SPECIFICATION FAN1582 REV. 1.1.3 11/9/03 7 The current out of the adjust pin adds to the current from R1 and is typically 50µA. Its output voltage contribution is small and only needs consideration when a very precise out- put voltage setting is required. Figure 2. Basic Regulator Circuit Load Regulation The FAN1582 family provides true remote sensing, eliminat- ing output voltage errors due to trace resistance. To utilize remote sensing, connect the VSENSE pin directly to the load, rather than at the VOUT pin. If the load is more than 1" away from the FAN1582, it may be necessary to increase the load capacitance to ensure stability. Thermal Considerations The FAN1582 series protect themselves under overload con- ditions with internal power and thermal limiting circuitry. However, for normal continuous load conditions, do not exceed maximum junction temperature ratings. It is important to consider all sources of thermal resistance from junction-to- ambient. These sources include the junction-to-case resistance, the case-to-heat sink interface resistance, and the heat sink resistance. Thermal resistance specifications have been developed to more accurately reflect device temperature and ensure safe operating temperatures. The electrical character- istics section provides a separate thermal resistance and maximum junction temperature for both the control circuitry and the power transistor. Calculate the maximum junction temperature for both sections to ensure that both thermal limits are met. For example, look at using an FAN1582M-1.5 to generate 3A @ 1.5V ± 2% from a 3.3V source (3.2V to 3.6V). Assumptions: •Vin = 3.6V worst case •VOUT = 1.47V worst case •IOUT = 3A continuous •TA = 70°C • Θ Case-to-Ambient = 5°C/W (assuming both a heatsink and a thermally conductive material) The power dissipation in this application is: PD = (VIN - VOUT) * (IOUT) = (3.6-1.47) * (3) = 6.39W From the specification table, TJ = TA + (PD) * (Θ Case-to-Ambient + ΘJC) = 70 + (6.39) * (5 + 3) = 121°C The junction temperature is below the maximum rating. Junction-to-case thermal resistance is specified from the IC junction to the bottom of the case directly below the die. This is the lowest resistance path for heat flow. Proper mounting ensures the best thermal flow from this area of the package to the heat sink. Use of a thermally conductive material at the case-to-heat sink interface is recommended. Use a thermally conductive spacer if the case of the device must be electri- cally isolated and include its contribution to the total thermal resistance. C2 22 µF VIN VOUT VREF C1 10 µF Vcntl + + Vcntl Vsense Vin Adj Vout FAN1582 R1 R2 IADJ 50 µA VOUT = VREF (1+R2/R1) + IADJ (R2) Figure 3. Application Circuit (FAN1582) 100 µF C2 10 µF C3 VCNTL = 5V 2.1V at 3A VIN = 3.3V + 10 µFC1 1 µF C4 + VIN VSENSE VCNTL Adj VOUT FAN1582 86.6 Ω 124 Ω R2 R1 U1 |
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