© 2005 Fairchild Semiconductor Corporation

DS500160

www.fairchildsemi.com

July 1999

Revised February 2005

74VCX00

Low Voltage Quad 2-Input NAND Gate

with 3.6V Tolerant Inputs and Outputs

General Description

The VCX00 contains four 2-input NAND gates. This prod-

tions with I/O compatibility up to 3.6V.

The VCX00 is fabricated with an advanced CMOS technol-

ogy to achieve high-speed operation while maintaining low

CMOS power dissipation.

Features

s 3.6V tolerant inputs and outputs

s Power-off high impedance inputs and outputs

s Uses patented noise/EMI reduction

circuitry

s Latchup performance exceeds JEDEC 78 conditions

s ESD performance:

Human body model

! 2000V

Machine model

! 250V

s Leadless Pb-Free DQFN package

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Pb-Free package per JEDED J-STD-020B.

Note 1: DQFN package available in Tape and Reel only.

Note 2: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.

Order Number

Package

Package Description

Number

74VCX00M

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74VCX00BQX

(Note 1)

MLP014A

Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC

MO-241, 2.5 x 3.0mm

74VCX00MTC

MTC14

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74VCX00MTCX_NL

(Note 2)

MTC14

Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide