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AM75DL9608HGT70IT Scheda tecnica(PDF) 4 Page - SPANSION

Il numero della parte AM75DL9608HGT70IT
Spiegazioni elettronici  64 Megabit (4 M x 16-Bit) and 32 Megabit (2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories, and
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Am75DL9608HG
November 17, 2003
ADV ANCE
I N FO RMAT I O N
GENERAL DESCRIPTION
The Am75DL9608HG consists of two flash memory
devices (one 64-Mbit Am29DL640H and one 32-Mbit
Am29DL320G), and one 8 Mbit pseudo SRAM device.
Am29DL640H and Am29DL320G Features
Am29DL640H is a 64 megabit, 3.0 volt-only flash
memory device, organized as 4,194,304 words. The
Am29DL320G is a 32 megabit, 3.0 volt-only flash
memory device, organized as 2,097,152 words. Word
mode data appears on DQ15–DQ0. The device is de-
signed to be programmed in-system with the standard
3.0 volt V
CC supply, and can also be programmed in
standard EPROM programmers.
The device is available with an access time of 70 or 85
ns and is offered in a 73-ball FBGA package. Standard
control pins—chip enable (CE#fx), write enable
(WE#), and output enable (OE#)—control normal read
and write operations, and avoid bus contention issues.
The device requires only a single 3.0 volt power sup-
ply for both read and write functions. Internally gener-
ated and regulated voltages are provided for the
program and erase operations.
Simultaneous Read/Write Operations with
Zero Latency
The Simultaneous Read/Write architecture provides
simultaneous operation by dividing the memory
space into four banks. Sector addresses are fixed,
system software can be used to form user-defined
bank groups.
During an Erase/Program operation, any of the three
non-busy banks may be read from. Note that only two
banks can operate simultaneously. The device can im-
prove overall system performance by allowing a host
sy stem to progra m or erase in one bank, then
immediately and simultaneously read from the other
bank, with zero latency. This releases the system from
waiting fo r the completion o f progra m or erase
operations.
The Am29DL640H can be organized as both a top and
bottom boot sector configuration.
The Am29DL320G can be organized as either a top or
bottom boot sector configuration. Top boot configura-
tion is shown in the following table.
Bottom boot configuration is shown in the following ta-
ble.
Available on Am29DL640H and Am29DL320G, the
SecSi™ (Secured Silicon) Sector is an extra 256
byte sector capable of being permanently locked by
AMD or customers. The Secure SectorSecSi Indica-
tor Bit (DQ7) is permanently set to a 1 if the part is
factory locked, and set to a 0 if customer lockable.
This way, customer lockable parts can never be used
to replace a factory locked part.
Factory locked parts provide several options. The Se-
cure SectorSecSi Sector may store a secure, random
16 byte ESN (Electronic Serial Number), customer
code (programmed through AMD’s ExpressFlash ser-
vice), or both. Customer Lockable parts may utilize the
Secure SectorSecSi Sector as a one-time programma-
ble area.
The AMD DMS (Data Management Software) man-
ages data programming, enables EEPROM emulation,
and eases historical sector erase flash limitations. For
more information on DMS or to obtain the software,
contact AMD or an authorized representative.
The device offers complete compatibility with the
JEDEC single-power-supply Flash command set
standard. Commands are written to the command
register using standard microprocessor write timings.
Reading data out of the device is similar to reading
from other Flash or EPROM devices.
The host system can detect whether a program or
erase operation is complete by using the device sta-
tus bits: RY/BY# pin, DQ7 (Data# Polling) and
DQ6/DQ2 (toggle bits). After a program or erase cycle
has been completed, the device automatically returns
to the read mode.
The sector erase architecture allows memory sec-
tors to be erased and reprogrammed without affecting
the data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection measures include a low
V
CC detector that automatically inhibits write opera-
tions during power transitions. The hardware sector
protection feature disables both program and erase
operations in any combination of the sectors of mem-
ory. This can be achieved in-system or via program-
ming equipment.
The device offers two power-saving features. When
addresses have been stable for a specified amount of
time, the device enters the automatic sleep mode.
Th e syste m can also place the device into th e
standby mode. Power consumption is greatly re-
duced in both modes.
Bank
Megabits
Sector Sizes
Bank 1
8 Mb
Eight 4 Kword,
Fifteen 32 Kword
Bank 2
24 Mb
Forty-eight 32 Kword
Bank 3
24 Mb
Forty-eight 32 Kword
Bank 4
8 Mb
Eight 4 Kword,
Fifteen 32 Kword
Bank
Megabits
Sector Sizes
Bank 1
4 Mb
Eight 4 Kword,
Seven 32 Kword
Bank 2
12 Mb
Twenty-four 32 Kword
Bank 3
12 Mb
Twenty-four 32 Kword
Bank 4
4 Mb
Eight 32 Kword
Bank
Megabits
Sector Sizes
Bank 1
4 Mb
Eight 32 Kword
Bank 2
12 Mb
Twenty-four 32 Kword
Bank 3
12 Mb
Twenty-four 32 Kword
Bank 4
4 Mb
Eight 4 Kword,
Seven 32 Kword


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