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74ACT646 Scheda tecnica(PDF) 6 Page - Fairchild Semiconductor

Il numero della parte 74ACT646
Spiegazioni elettronici  Octal Transceiver/Register with 3-STATE Outputs
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Produttore elettronici  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

74ACT646 Scheda tecnica(HTML) 6 Page - Fairchild Semiconductor

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6
AC Electrical Characteristics for AC
Note 8: Voltage Range 3.3 is 3.3V
± 0.3V
Voltage Range 5.0 is 5.0V
± 0.5V
AC Operating Requirements for AC
Note 9: Voltage Range 3.3 is 3.3V
± 0.3V
Voltage Range 5.0 is 5.0V
± 0.5V
VCC
TA = +25°CTA = −40°C to +85°C
Symbol
Parameter
(V)
CL = 50 pF
CL = 50 pF
Units
(Note 8)
Min
Typ
Max
Min
Max
tPLH
Propagation Delay
3.3
4.0
10.5
16.5
3.0
18.5
ns
Clock to Bus
5.0
2.5
7.5
12.0
2.0
13.0
tPHL
Propagation Delay
3.3
3.0
9.5
14.5
2.5
16.0
ns
Clock to Bus
5.0
2.0
6.5
10.5
1.5
11.5
tPLH
Propagation Delay
3.3
2.5
7.5
12.0
2.0
13.5
ns
Bus to Bus
5.0
1.5
5.0
8.0
1.0
9.0
tPHL
Propagation Delay
3.3
1.5
7.5
12.5
1.5
13.5
ns
Bus to Bus
5.0
1.5
5.0
9.0
1.0
9.5
tPLH
Propagation Delay
3.3
2.0
8.5
13.5
1.5
15.5
SBA or SAB to An or Bn
5.0
1.5
6.0
10.0
1.5
11.0
ns
(w/ An or Bn HIGH or LOW)
tPHL
Propagation Delay
3.3
1.5
8.5
13.5
1.5
15.0
SBA or SAB to An or Bn
5.0
1.5
6.0
10.0
1.5
11.0
ns
(w/ An or Bn HIGH or LOW)
tPZH
Enable Time
3.3
2.5
7.0
11.5
2.0
12.5
ns
G to An or Bn
5.0
1.5
5.0
8.5
1.5
9.0
tPZL
Enable Time
3.3
2.5
7.5
12.5
2.0
14.0
ns
G to An or Bn
5.0
1.5
5.5
9.0
1.5
10.0
tPHZ
Disable Time
3.3
3.0
8.0
12.5
2.5
13.5
ns
G to An or Bn
5.0
2.0
6.5
10.0
2.0
11.0
tPLZ
Disable Time
3.3
2.0
7.5
12.0
2.0
13.5
ns
G to An or Bn
5.0
1.5
6.0
9.5
1.5
10.5
tPZH
Enable Time
3.3
2.0
6.5
11.0
1.5
12.0
ns
DIR to An or Bn
5.0
1.5
5.0
7.5
1.0
8.5
tPZL
Enable Time
3.3
2.5
7.0
11.5
2.0
13.0
ns
DIR to An or Bn
5.0
1.5
5.0
8.0
1.0
9.0
tPHZ
Disable Time
3.3
2.5
7.5
11.5
1.5
12.5
ns
DIR to An or Bn
5.0
1.5
5.5
9.5
1.5
10.0
tPLZ
Disable Time
3.3
1.5
7.5
12.0
1.5
13.5
ns
DIR to An or Bn
5.0
1.5
5.5
9.5
1.5
10.5
VCC
TA = +25°CTA = −40°C to +85°C
Symbol
Parameter
(V)
CL = 50 pF
CL = 50 pF
Units
(Note 9)
Typ
Guaranteed Minimum
tS
Setup Time, HIGH or LOW
3.3
2.0
5.0
5.5
ns
Bus to Clock
5.0
1.5
4.0
4.5
tH
Hold Time, HIGH or LOW
3.3
−1.5
0
0
ns
Bus to Clock
5.0
−0.5
0.5
1.0
tW
Clock Pulse Width
3.3
2.0
3.5
4.5
ns
HIGH or LOW
5.0
2.0
3.5
3.5


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