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AM29BDS128HE8VFI Scheda tecnica(PDF) 7 Page - Advanced Micro Devices |
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AM29BDS128HE8VFI Scheda tecnica(HTML) 7 Page - Advanced Micro Devices |
7 / 89 page May 10, 2006 27024B3 Am29BDS128H/Am29BDS640H 5 D A TA SH EE T PRODUCT SELECTOR GUIDE Note: Speed Options ending in “8” indicate the “reduced wait-state handshaking” option, which speeds initial synchronous accesses for even addresses. Speed Options ending in “9” indicate the “standard handshaking” option. See the AC Characteristics section of this data sheet for full specifications. BLOCK DIAGRAM Note: Amax = A22 (128 Mb) or A21 (64 Mb) Part Number Am29BDS128H/Am29BDS640H Burst Frequency 66 MHz 54 MHz Speed Option VCC, VIO = 1.65 – 1.95 V E8, E9 D8, D9 Max Initial Synchronous Access Time, ns (TIACC) Reduced Wait-state Handshaking; Even Address 56 69 Max Initial Synchronous Access Time, ns (TIACC) Reduced Wait-state Handshaking; Odd Address; or Standard Handshaking 71 87.5 Max Burst Access Time, ns (TBACC) 11 13.5 Max Asynchronous Access Time, ns (TACC) 50 55 Max CE# Access Time, ns (TCE) Max OE# Access Time, ns (TOE) 11 13.5 Input/Output Buffers X-Decoder Y-Decoder Chip Enable Output Enable Logic Erase Voltage Generator PGM Voltage Generator Timer VCC Detector State Control Command Register VCC VSS VIO WE# RESET# WP# ACC CE# OE# DQ15–DQ0 Data Latch Y-Gating Cell Matrix Amax–A0 RDY Buffer RDY Burst State Control Burst Address Counter AVD# CLK |
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