AD9236

Rev. B | Page 6 of 36

SWITCHING SPECIFICATIONS

AVDD = 3 V, DRVDD = 2.5 V, unless otherwise noted.

Table 4.

AD9236BRU/AD9236BCP

Parameter

Temp

Test Level

Min

Typ

Max

Unit

CLOCK INPUT PARAMETERS

Maximum Conversion Rate

Full

VI

80

MSPS

Minimum Conversion Rate

Full

V

1

MSPS

CLK Period

Full

V

12.5

ns

CLK Pulse Width High1

Full

V

4.0

ns

CLK Pulse Width Low1

Full

V

4.0

ns

DATA OUTPUT PARAMETERS

Full

V

3.5

ns

Pipeline Delay (Latency)

Full

V

7

Cycles

Full

V

1.0

ns

Full

V

0.3

ps rms

Wake-Up Time3

Full

V

7

ms

OUT OF RANGE RECOVERY TIME

Full

V

2

Cycles

2.0ns MIN

03066-0-002

N–9

N–8

N–7

N–6

N–5

N–4

N–3

N–2

N–1

N

ANALOG

INPUT

CLK

DATA

OUT

N–1

N

N+1

N+2

N+3

N+4

N+5

N+6

N+7

N+8

Figure 2. Timing Diagram

Table 5. Explanation of Test Levels

Test Level

Definitions

I

100% production tested.

II

100% production tested at 25°C and guaranteed by design and characterization at specified temperatures.

III

Sample tested only.

IV

Parameter is guaranteed by design and characterization testing.

V

Parameter is a typical value only.

VI

100% production tested at 25°C and guaranteed by design and characterization for industrial temperature range.