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AM41DL3224GT30IS Scheda tecnica(PDF) 11 Page - Advanced Micro Devices |
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AM41DL3224GT30IS Scheda tecnica(HTML) 11 Page - Advanced Micro Devices |
11 / 65 page 10 Am41DL32x4G November 12, 2001 P R E L IMINARY DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory loca- ti on. The r egi s t er i s a la tc h us ed to s t or e the commands, along with the address and data informa- tion needed to execute the command. The contents of the register serve as inputs to the internal state ma- chine. The state machine outputs dictate the function of the device. Tables 1 through 3 list the device bus operations, the inputs and control levels they require, and the resulting output. The following subsections de- scribe each of these operations in further detail. |
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