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AD7541JN Scheda tecnica(PDF) 7 Page - Intersil Corporation |
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AD7541JN Scheda tecnica(HTML) 7 Page - Intersil Corporation |
7 / 8 page 7 Dynamic Performance The dynamic performance of the DAC, also depends on the output amplifier selection. For low speed or static applications, AC specifications of the amplifier are not very critical. For high-speed applications slew-rate, settling-time, openloop gain and gain/phase-margin specifications of the amplifier should be selected for the desired performance. The output impedance of the AD7541 looking into IOUT1 varies between 10k Ω (R FEEDBACK alone) and 5kΩ (RFEEDBACK in parallel with the ladder resistance). Similarly the output capacitance varies between the minimum and the maximum values depending on the input code. These variations necessitate the use of compensation capacitors, when high speed amplifiers are used. A capacitor in parallel with the feedback resistor (as shown in Figure 10) provides the necessary phase compensation to critically damp the output. A small capacitor connected to the compensation pin of the amplifier may be required for unstable situations causing oscillations. Careful PC board layout, minimizing parasitic capacitances, is also vital. FIGURE 7. OUTPUT CAPACITANCE TEST CIRCUIT FIGURE 8. FEEDTHROUGH ERROR TEST CIRCUIT FIGURE 9. OUTPUT CURRENT SETTLING TIME TEST CIRCUIT Test Circuits (Continued) SCOPE AD7541 17 16 18 1 2 3 17 5 4 BIT 1 (MSB) BIT 12 (LSB) +15V NC +15V NC 1K 100mVP-P 1MHz HA2600 AD7541 17 16 18 1 2 3 15 5 4 +15V VOUT IOUT1 IOUT2 3 2 6 GND VREF = 20VP-P 10kHz SINE WAVE BIT 1 (MSB) BIT 12 (LSB) VREF +15V +10V BIT 1 (MSB) BIT 12 (LSB) AD7541 EXTRAPOLATE +100mV 100 Ω IOUT2 GND +5V 0V DIGITAL INPUT 17 16 1 2 3 15 5 4 OSCILLOSCOPE 3t: 5% SETTLING 9t: 0.01% SETTLING VREF +15V +10V BIT 1 (MSB) BIT 12 (LSB) AD7541 RFEEDBACK IOUT2 GND 17 16 1 2 3 15 5 4 BIT 2 18 IOUT1 A - + VOUT CC FIGURE 10. GENERAL DAC CIRCUIT WITH COMPENSATION CAPACITOR, CC AD7541 |
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