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CA3140AE Scheda tecnica(PDF) 7 Page - Intersil Corporation |
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CA3140AE Scheda tecnica(HTML) 7 Page - Intersil Corporation |
7 / 23 page 7 FN957.10 July 11, 2005 Output Circuit Considerations Excellent interfacing with TTL circuitry is easily achieved with a single 6.2V zener diode connected to Terminal 8 as shown in Figure 1. This connection assures that the maximum output signal swing will not go more positive than the zener voltage minus two base-to-emitter voltage drops within the CA3140. These voltages are independent of the operating supply voltage. Figure 2 shows output current sinking capabilities of the CA3140 at various supply voltages. Output voltage swing to the negative supply rail permits this device to operate both power transistors and thyristors directly without the need for level shifting circuitry usually associated with the 741 series of operational amplifiers. Figure 4 shows some typical configurations. Note that a series resistor, RL, is used in both cases to limit the drive available to the driven device. Moreover, it is recommended that a series diode and shunt diode be used at the thyristor input to prevent large negative transient surges that can appear at the gate of thyristors, from damaging the integrated circuit. Offset Voltage Nulling The input offset voltage can be nulled by connecting a 10k Ω potentiometer between Terminals 1 and 5 and returning its wiper arm to terminal 4, see Figure 3A. This technique, however, gives more adjustment range than required and therefore, a considerable portion of the potentiometer rotation is not fully utilized. Typical values of series resistors (R) that may be placed at either end of the potentiometer, see Figure 3B, to optimize its utilization range are given in the Electrical Specifications table. An alternate system is shown in Figure 3C. This circuit uses only one additional resistor of approximately the value shown in the table. For potentiometers, in which the resistance does not drop to 0 Ω at either end of rotation, a value of resistance 10% lower than the values shown in the table should be used. Low Voltage Operation Operation at total supply voltages as low as 4V is possible with the CA3140. A current regulator based upon the PMOS threshold voltage maintains reasonable constant operating current and hence consistent performance down to these lower voltages. The low voltage limitation occurs when the upper extreme of the input common mode voltage range extends down to the voltage at Terminal 4. This limit is reached at a total supply voltage just below 4V. The output voltage range also begins to extend down to the negative supply rail, but is slightly higher than that of the input. Figure 8 shows these characteristics and shows that with 2V dual supplies, the lower extreme of the input common mode voltage range is below ground potential. 3 2 4 CA3140 8 6 7 V+ 5V TO 36V 6.2V ≈5V LOGIC SUPPLY 5V TYPICAL TTL GATE FIGURE 1. ZENER CLAMPING DIODE CONNECTED TO TERMINALS 8 AND 4 TO LIMIT CA3140 OUTPUT SWING TO TTL LEVELS 1 0.01 0.1 LOAD (SINKING) CURRENT (mA) 1.0 10 10 100 1000 SUPPLY VOLTAGE (V-) = 0V TA = 25 oC SUPPLY VOLTAGE (V+) = +5V +15V +30V FIGURE 2. VOLTAGE ACROSS OUTPUT TRANSISTORS (Q15 AND Q16) vs LOAD CURRENT FIGURE 3A. BASIC FIGURE 3B. IMPROVED RESOLUTION FIGURE 3C. SIMPLER IMPROVED RESOLUTION FIGURE 3. THREE OFFSET VOLTAGE NULLING METHODS 3 2 4 CA3140 7 6 V+ 5 1 V- 10k Ω 3 2 4 CA3140 7 6 V+ 5 1 V- 10k Ω R R 3 2 4 CA3140 7 6 V+ 5 1 V- 10k Ω R CA3140, CA3140A |
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