AT90S2313_02 datasheet(5/92 Pages) ATMEL

Il numero della parte	AT90S2313

Spiegazioni elettronici	8-bit Microcontroller with 2K Bytes of In-System Programmable Flash

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Produttore elettronici	ATMEL [ATMEL Corporation]

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AT90S2313

0839I–AVR–06/02

Architectural

Overview

The fast-access Register File concept contains 32 x 8-bit general purpose working reg-

isters with a single clock cycle access time. This means that during one single clock

cycle, one ALU (Arithmetic Logic Unit) operation is executed. Two operands are output

from the Register File, the operation is executed, and the result is stored back in the

Register File – in one clock cycle.

Figure 4. The AT90S2313 AVR RISC Architecture

Six of the 32 registers can be used as three 16-bit indirect address register pointers for

Data Space addressing – enabling efficient address calculations. One of the three

address pointers is also used as the address pointer for the constant table look-up func-

tion. These added function registers are the 16-bit X-register, Y-register, and Z-register.

The ALU supports arithmetic and logic functions between registers or between a con-

stant and a register. Single register operations are also executed in the ALU. Figure 4

shows the AT90S2313 AVR RISC microcontroller architecture.

In addition to the register operation, the conventional memory addressing modes can be

used on the Register File as well. This is enabled by the fact that the Register File is

assigned the 32 lowermost Data Space addresses ($00 - $1F), allowing them to be

accessed as though they were ordinary memory locations.

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