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MC14569B Scheda tecnica(PDF) 6 Page - ON Semiconductor

Il numero della parte MC14569B
Spiegazioni elettronici  Programmable Divide-By-N Dual 4-Bit Binary/BCD Down Counter
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Table 1Mode Controls (Cascade Feedback = Low)
Counter Control Values
Divide Ratio
CTL1
CTL2
Zero Detect
Q
0
0
256
256
0
1
160
160
1
0
160
160
1
1
100
100
NOTE: Data Preset Inputs (P0−P7) are “Don’t Cares” while Cascade Feedback is
Low.
Table 2Mode Controls (CTL1 = Low, CTL2 = Low, Cascade Feedback = High)
Preset Inputs
Divide Ratio
P7
P6
P5
P4
P3
P2
P1
P0
Zero
Detect
Q
Comments
0
0
0
0
0
0
0
0
256
256
Max Count
0
0
0
0
0
0
0
1
X
X
Illegal State
0
0
0
0
0
0
1
0
2
X
Min Count
0
0
0
0
0
0
1
1
3
X









X









X









X
0
0
0
0
1
1
1
1
15
X
0
0
0
1
0
0
0
0
16
X









X









X









X
0
0
1
0
0
0
0
0
32
X









X









X









X
0
1
0
0
0
0
0
0
64
X









X









X









X
0
1
1
1
1
1
1
1
127
X
1
0
0
0
0
0
0
0
128
128
Q Output Active






























1
0
0
0
1
0
0
0
136
136






























1
1
1
1
1
1
1
1
255
255
27
26
25
24
23
22
21
20
128
64
32
16
8
4
2
1
Bit Value
Counter #2
Binary
Counter #1
Binary
Counting
Sequence
X = No Output (Always Low)


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