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MC14067BCP Scheda tecnica(PDF) 1 Page - ON Semiconductor |
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MC14067BCP Scheda tecnica(HTML) 1 Page - ON Semiconductor |
1 / 10 page © Semiconductor Components Industries, LLC, 2005 February, 2005 − Rev. 5 1 Publication Order Number: MC14067B/D MC14067B Analog Multiplexers / Demultiplexers The MC14067 multiplexer/demultiplexer is a digitally controlled analog switch featuring low ON resistance and very low leakage current. This device can be used in either digital or analog applications. The MC14067 is a 16−channel multiplexer/demultiplexer with an inhibit and four binary control inputs A, B, C, and D. These control inputs select 1−of−16 channels by turning ON the appropriate analog switch (see MC14067 truth table.) Features • Low OFF Leakage Current • Matched Channel Resistance • Low Quiescent Power Consumption • Low Crosstalk Between Channels • Wide Operating Voltage Range: 3 to 18 V • Low Noise • Pin for Pin Replacement for CD4067B • Pb−Free Packages are Available* MAXIMUM RATINGS (Voltages Referenced to VSS) Symbol Parameter Value Unit VDD DC Supply Voltage Range – 0.5 to + 18.0 V Vin, Vout Input or Output Voltage Range (DC or Transient) – 0.5 to VDD + 0.5 V Iin Input Current (DC or Transient), per Control Pin ± 10 mA Isw Switch Through Current ± 25 mA PD Power Dissipation, per Package (Note 1) 500 mW TA Ambient Temperature Range – 55 to + 125 _C Tstg Storage Temperature Range – 65 to + 150 _C TL Lead Temperature (8–Second Soldering) 260 _C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Temperature Derating: Plastic “P and D/DW” Packages: − 7.0 mW/ _C From 65_C To 125_C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS v (Vin or Vout) v VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com MARKING DIAGRAMS PDIP−24 P SUFFIX CASE 709 SOIC−24 DW SUFFIX CASE 751E A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. ORDERING INFORMATION MC14067BCP AWLYYWW 14067B AWLYYWW |
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