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CAT28C64BKA-90T Scheda tecnica(PDF) 1 Page - Catalyst Semiconductor |
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CAT28C64BKA-90T Scheda tecnica(HTML) 1 Page - Catalyst Semiconductor |
1 / 13 page 1 CAT28C64B 64K-Bit CMOS PARALLEL EEPROM FEATURES I Fast read access times: – 90/120/150ns I Low power CMOS dissipation: – Active: 25 mA max. – Standby: 100 µµµµµA max. I Simple write operation: – On-chip address and data latches – Self-timed write cycle with auto-clear I Fast write cycle time: – 5ms max. I CMOS and TTL compatible I/O I Hardware and software write protection DESCRIPTION The CAT28C64B is a fast, low power, 5V-only CMOS Parallel EEPROM organized as 8K x 8-bits. It requires a simple interface for in-system programming. On-chip address and data latches, self-timed write cycle with auto-clear and VCC power up/down write protection eliminate additional timing and protection hardware. DATA Polling and Toggle status bits signal the start and end of the self-timed write cycle. Additionally, the CAT28C64B features hardware and software write protection. BLOCK DIAGRAM I Commercial, industrial and automotive temperature ranges I Automatic page write operation: – 1 to 32 bytes in 5ms – Page load timer I End of write detection: – Toggle bit – DATA DATA DATA DATA DATA polling I 100,000 program/erase cycles I 100 year data retention The CAT28C64B is manufactured using Catalyst’s advanced CMOS floating gate technology. It is designed to endure 100,000 program/erase cycles and has a data retention of 100 years. The device is available in JEDEC- approved 28-pin DIP, TSOP, SOIC, or, 32-pin PLCC package . © 2005 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice Doc. No. 1011, Rev. F ALO GEN FR TM LEAD FREE ADDR. BUFFER & LATCHES ADDR. BUFFER & LATCHES INADVERTENT WRITE PROTECTION CONTROL LOGIC TIMER ROW DECODER COLUMN DECODER HIGH VOLTAGE GENERATOR A5–A12 CE OE WE A0–A4 I/O0–I/O7 I/O BUFFERS 8,192 x 8 EEPROM ARRAY 32 BYTE PAGE REGISTER VCC DATA POLLING AND TOGGLE BIT |
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