MC10158

http://onsemi.com

2

ELECTRICAL CHARACTERISTICS

Test Limits

Pin

Under

–30

°C

+25

°C

+85

°C

Characteristic

Symbol

Under

Test

Min

Max

Min

Typ

Max

Min

Max

Unit

Power Supply Drain Current

8

53

38

48

53

mAdc

Input Current

9

5

360

400

225

250

225

250

µAdc

5

0.5

0.5

0.3

µAdc

Output Voltage

Logic 1

1

–1.060

–0.890

–0.960

–0.810

–0.890

–0.700

Vdc

Output Voltage

Logic 0

1

–1.890

–1.675

–1.850

–1.650

–1.825

–1.615

Vdc

Threshold Voltage

Logic 1

1

–1.080

–0.980

–0.910

Vdc

Threshold Voltage

Logic 0

1

–1.655

–1.630

–1.595

Vdc

Switching Times (50

Ω Load)

ns

Propagation

Data Input

Delay

Select Input

1

1

1.3

2.5

3.1

4.8

1.2

2.4

2.5

3.2

3.0

4.5

1.3

2.5

3.2

4.8

Rise Time

(20 to 80%)

1

1.6

3.4

1.5

2.5

3.3

1.6

3.4

Fall Time

(20 to 80%)

1

1.6

3.4

1.5

2.5

3.3

1.6

3.4

TEST VOLTAGE VALUES (Volts)

@ Test Temperature

–30

°C

–0.890

–1.890

–1.205

–1.500

–5.2

+25

°C

–0.810

–1.850

–1.105

–1.475

–5.2

+85

°C

–0.700

–1.825

–1.035

–1.440

–5.2

Pin

Under

TEST VOLTAGE APPLIED TO PINS LISTED BELOW

(V

)

Characteristic

Symbol

Under

Test

Gnd

Power Supply Drain Current

8

8

16

Input Current

9

5

9

5

8

8

16

16

5

5

8

16

Output Voltage

Logic 1

1

5

8

16

Output Voltage

Logic 0

1

8

16

Threshold Voltage

Logic 1

1

5

8

16

Threshold Voltage

Logic 0

1

5

8

16

Switching Times

(50

Ω Load)

+1.11V

+0.31V

Pulse In

Pulse Out

–3.2 V

+2.0 V

Propagation Delay

Data Input

Select Input

1

1

6

5

9

1

1

8

8

16

16

Rise Time

(20 to 80%)

1

5

1

8

16

Fall Time

(20 to 80%)

1

5

1

8

16

Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been

established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.

Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the

same manner.