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MC100LVEL56DWG Scheda tecnica(PDF) 1 Page - ON Semiconductor |
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MC100LVEL56DWG Scheda tecnica(HTML) 1 Page - ON Semiconductor |
1 / 7 page © Semiconductor Components Industries, LLC, 2006 November, 2006 − Rev. 11 1 Publication Order Number: MC100LVEL56/D MC100LVEL56 3.3VECL Dual Differential 2:1 Multiplexer Description The MC100LVEL56 is a dual, fully differential 2:1 multiplexer. The differential data path makes the device ideal for multiplexing low skew clock or other skew sensitive signals. The device features both individual and common select inputs to address both data path and random logic applications. The differential inputs have special circuitry which ensures device stability under open input conditions. When both differential inputs are left open the D input will pull down to VEE, The D input will bias around VCC/2 forcing the Q output LOW. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. Features • 580 ps Typical Propagation Delays • Separate and Common Select • The 100 Series Contains Temperature Compensation • PECL Mode Operating Range: VCC = 3.0 V to 3.8 V with VEE = 0 V • NECL Mode Operating Range: VCC = 0 V with VEE = −3.0 V to −3.8 V • Internal Input Pulldown Resistors on D(s), SEL(s), and COM_SEL • Q Output will Default LOW with Inputs Open or at VEE • Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. *For additional marking information, refer to Application Note AND8002/D. MARKING DIAGRAM* A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G= Pb−Free Package SO−20 WB DW SUFFIX CASE 751D See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. ORDERING INFORMATION 20 1 100LVEL56 AWLYYWWG http://onsemi.com |
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