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MC100LVEL38 Scheda tecnica(PDF) 6 Page - ON Semiconductor |
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MC100LVEL38 Scheda tecnica(HTML) 6 Page - ON Semiconductor |
6 / 7 page MC100LVEL38 http://onsemi.com 6 ORDERING INFORMATION Device Package Package† MC100LVEL38DW SOIC−20 38 Units / Rail MC100LVEL38DWG SOIC−20 (Pb−Free) 38 Units / Rail MC100LVEL38DWR2 SOIC−20 1000 / Tape & Reel MC100LVEL38DWR2G SOIC−20 (Pb−Free) 1000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPS I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1672/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices |
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