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MC100LVEL14 Scheda tecnica(PDF) 5 Page - ON Semiconductor |
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MC100LVEL14 Scheda tecnica(HTML) 5 Page - ON Semiconductor |
5 / 6 page MC100LVEL14 http://onsemi.com 5 Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) Driver Device Receiver Device QD Q D Zo = 50 W Zo = 50 W 50 W 50 W VTT VTT = VCC − 2.0 V ORDERING INFORMATION Device Package Shipping† MC100LVEL14DW SOIC−20 38 Units / Rail MC100LVEL14DWG SOIC−20 (Pb−Free) 38 Units / Rail MC100LVEL14DWR2 SOIC−20 1000 Tape & Reel MC100LVEL14DWR2G SOIC−20 (Pb−Free) 1000 Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1672/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices |
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