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MC100H640FNG Scheda tecnica(PDF) 4 Page - ON Semiconductor |
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MC100H640FNG Scheda tecnica(HTML) 4 Page - ON Semiconductor |
4 / 9 page MC10H640, MC100H640 http://onsemi.com 4 Table 6. AC CHARACTERISTICS (VT = VE = 5.0 V ± 5%) Symbol Characteristic Condition 0°C 25°C 85°C Unit Min Max Min Max Min Max tPLH Propagation Delay ECL D to Output Q0 − Q3 CL = 25 pF 4.0 6.0 4.0 6.0 4.2 6.2 ns tPLH Propagation Delay TTL D to Output CL = 25 pF 4.0 6.0 4.0 6.0 4.3 6.3 ns tskwd* Within−Device Skew CL = 25 pF 0.5 0.5 0.5 ns tPLH Propagation Delay ECL D to Output Q0, Q1 CL = 25 pF 4.0 6.0 4.0 6.0 4.2 6.2 ns tPLH Propagation Delay TTL D to Output CL = 25 pF 4.0 6.0 4.0 6.0 4.3 6.3 ns tPLH Propagation Delay ECL D to Output Q4, Q5 CL = 25 pF 4.0 6.0 4.0 6.0 4.2 6.2 ns tPLH Propagation Delay TTL D to Output CL = 25 pF 4.0 6.0 4.0 6.0 4.3 6.3 ns tPD Propagation Delay R to Output All Outputs CL = 25 pF 4.3 6.3 4.3 6.3 5.0 7.0 ns tR tF Output Rise/Fall Time 0.8 V to 2.0 V All Outputs CL = 25 pF 2.5 2.5 2.5 2.5 2.5 2.5 ns fmax Maximum Input Frequency CL = 25 pF 135 135 135 MHz tpw Minimum Pulse Width 1.50 1.50 1.50 ns trr Reset Recovery Time 1.25 1.25 1.25 ns NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 3. Within−Device Skew defined as identical transitions on similar paths through a device. Table 7. VCC and CL RANGES TO MEET DUTY CYCLE REQUIREMENTS (0°C ≤ TA ≤ 85°C Output Duty Cycle Measured Relative to 1.5 V) Symbol Characteristic Condition Min Nom Max Unit Range of VCC and CL to meet mini- mum pulse width (HIGH or LOW) = 11.5 ns at fout ≤ 40 MHz VCC CL Q0 − Q3 Q0 − Q1 4.75 10 5.0 5.25 50 V pF Range of VCC and CL to meet mini- mum pulse width (HIGH or LOW) = 9.5 ns at 40 < fout ≤ 50 MHz VCC CL Q0 − Q3 4.875 15 5.0 5.125 27 V pF |
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