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MC10H135L Scheda tecnica(PDF) 2 Page - ON Semiconductor |
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MC10H135L Scheda tecnica(HTML) 2 Page - ON Semiconductor |
2 / 7 page MC10H135 http://onsemi.com 2 Figure 1. Logic Diagram Figure 2. Pin Assignment VCC1 Q1 Q1 R1 S1 K1 J1 VEE VCC2 Q2 Q2 R2 S2 K2 J2 C 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 VCC1 = PIN 1 VCC2 = PIN 16 VEE = PIN 8 S1 5 J1 7 K1 6 R1 4 C 9 S2 12 J2 10 K2 11 R2 13 Q1 Q1 Q2 Q2 2 3 15 14 Pin assignment is for Dual−in−Line Package. Table 1. RS TRUTH TABLE R S Qn+1 L L Qn L H H H L L H H ND ND = Not Defined Table 2. CLOCK J−K TRUTH TABLE* J K Qn+1 L L Qn H L L L H H H H Qn *Output states change on positive transition of clock for J − K input condition present. Table 3. MAXIMUM RATINGS Symbol Characteristic Rating Unit VEE Power Supply (VCC = 0) −8.0 to 0 Vdc VI Input Voltage (VCC = 0) 0 to VEE Vdc Iout Output Current − Continuous − Surge 50 100 mA TA Operating Temperature Range 0 to +75 °C Tstg Storage Temperature Range − Plastic − Ceramic −55 to +150 −55 to +165 °C °C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. |
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