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MC100EP11DTG Scheda tecnica(PDF) 1 Page - ON Semiconductor |
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MC100EP11DTG Scheda tecnica(HTML) 1 Page - ON Semiconductor |
1 / 11 page © Semiconductor Components Industries, LLC, 2006 December, 2006 − Rev. 8 1 Publication Order Number: MC10EP11/D MC10EP11, MC100EP11 3.3V / 5VECL 1:2 Differential Fanout Buffer Description The MC10/100EP11 is a differential 1:2 fanout buffer. The device is pin and functionally equivalent to the LVEL11 device. With AC performance much faster than the LVEL11 device, the EP11 is ideal for applications requiring the fastest AC performance available. The 100 Series contains temperature compensation. Features • 220 ps Typical Propagation Delay • Maximum Clock Frequency > 3 GHz Typical • PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V • NECL Mode Operating Range: VCC = 0 V with VEE = −3.0 V to −5.5 V • Open Input Default State • Safety Clamp on Inputs • Q Outputs Will Default LOW with Inputs Open or at VEE • Pb−Free Packages are Available A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb−Free Package H = MC10 K = MC100 5K = MC10 2Z = MC100 M = Date Code SOIC−8 D SUFFIX CASE 751 MARKING DIAGRAMS* TSSOP−8 DT SUFFIX CASE 948R ALYWG G HP11 ALYWG G KP11 1 8 1 8 1 8 http://onsemi.com *For additional marking information, refer to Application Note AND8002/D. See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. ORDERING INFORMATION 1 8 HEP11 ALYW G 1 8 KEP11 ALYW G 1 8 DFN8 MN SUFFIX CASE 506AA 14 (Note: Microdot may be in either location) |
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