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74FST6800DTR2 Scheda tecnica(PDF) 3 Page - ON Semiconductor |
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74FST6800DTR2 Scheda tecnica(HTML) 3 Page - ON Semiconductor |
3 / 6 page 74FST6800 http://onsemi.com 3 RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit VCC Supply Voltage Operating, Data Retention Only 4.0 5.5 V VI Input Voltage (Note 5) 0 5.5 V VO Output Voltage (HIGH or LOW State) 0 5.5 V TA Operating Free−Air Temperature *40 )85 °C Dt/DV Input Transition Rise or Fall Rate Switch Control Input Switch I/O VCC = 5.0 V $ 0.5 V 0 DC 5 ns/V 5. Unused control inputs may not be left open. All control inputs must be tied to a high or low logic input voltage level. DC ELECTRICAL CHARACTERISTICS Symbol Parameter Conditions VCC (V) TA = *405C to )855C Unit Min Typ* Max VIK Clamp Diode Resistance IIN = *18mA 4.5 *1.2 V VIH High−Level Input Voltage 4.0 to 5.5 2.0 V VIL Low−Level Input Voltage 4.0 to 5.5 0.8 V II Input Leakage Current 0 v VIN v 5.5 V 5.5 $1.0 mA IOZ OFF−STATE Leakage Current 0 v A, B v VCC 5.5 $1.0 mA RON Switch On Resistance (Note 6) VIN = 0 V, IIN = 64 mA 4.5 4 7 W VIN = 0 V, IIN = 30 mA 4.5 4 7 VIN = 2.4 V, IIN = 15 mA 4.5 8 15 VIN = 2.4 V, IIN = 15 mA 4.0 11 20 ICC Quiescent Supply Current VIN = VCC or GND, IOUT = 0 5.5 3 mA DICC Increase In ICC per Input One input at 3.4 V, Other inputs at VCC or GND 5.5 2.5 mA *Typical values are at VCC = 5.0 V and TA = 25°C. 6. Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the voltages on the two (A or B) pins. AC ELECTRICAL CHARACTERISTICS Symbol Parameter Conditions TA = *405C to )855C CL = 50 pF, RU = RD = 500 W Unit VCC = 4.5−5.5 V VCC = 4.0 V Min Max Min Max tPHL, tPLH Prop Delay Bus to Bus (Note 7) VI = OPEN 0.25 0.25 ns tPZH, tPZL Output Enable Time, IOE to Bus A, B Bias V = GND VI = OPEN for tPZH 1.0 5.1 5.6 ns tPHZ, tPLZ Output Disable Time, IOE to Bus A, B Bias V = GND VI = OPEN for tPHZ 1.0 5.5 5.5 ns 7. This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance). CAPACITANCE (Note 8) Symbol Parameter Conditions Typ Max Unit CIN Control Pin Input Capacitance VCC = 5.0 V 3 pF CI/O A/B Port Input/Output Capacitance VCC, OE = 5.0 V 5 pF 8. TA = )25°C, f = 1 MHz, Capacitance is characterized but not tested. |
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