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CAT130049SWI-GT3 Scheda tecnica(PDF) 2 Page - Catalyst Semiconductor

Il numero della parte CAT130049SWI-GT3
Spiegazioni elettronici  Voltage Supervisor with Microwire Serial CMOS EEPROM
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Produttore elettronici  CATALYST [Catalyst Semiconductor]
Homepage  http://www.catalyst-semiconductor.com
Logo CATALYST - Catalyst Semiconductor

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CAT130xx
© 2007 Catalyst Semiconductor, Inc.
2
Doc. No. 1121 Rev. A
Characteristics subject to change without notice
BLOCK DIAGRAM
ABSOLUTE MAXIMUM RATINGS
(1)
Parameters
Ratings
Units
Storage Temperature
-65 to +150
°C
Voltage on Any Pin with Respect to Ground
(2)
-0.5 to +6.5
V
RELIABILITY CHARACTERISTICS
(3)
Symbol Parameter
Min
Units
NEND
(4)
Endurance
1,000,000
Program/ Erase Cycles
TDR
Data Retention
100
Years
D.C. OPERATING CHARACTERISTICS
VCC = +2.5V to +5.5V unless otherwise specified.
Limits
Symbol
Parameter
Min.
Typ.
Max.
Test Condition
Units
ICC
Supply Current
3
Read or Write at 1MHz
mA
12
25
VCC < 5.5V; All I/O Pins at VSS or VCC
ISB
Standby Current
10
20
VCC < 3.6V; All I/O Pins at VSS or VCC
μA
IL
I/O Pin Leakage
2
Pin at GND or VCC
μA
VIL
Input Low Voltage
-0.5
0.8
V
VIH
Input High Voltage
2.0
VCC + 0.5
V
VOL
Output Low Voltage
0.4
VCC 2.5V, IOL = 2.1mA
V
VOH
Output High Voltage
2.4
VCC 4.5V, IOH = -0.4mA
V
Notes:
(1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this
specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.
(2) The DC input voltage on any pin should not be lower than -0.5 V or higher than VCC + 0.5 V. During transitions, the voltage on any pin may
undershoot to no less than -1.5 V or overshoot to no more than VCC + 1.5 V, for periods of less than 20 ns.
(3) These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC-Q100
and JEDEC test methods.
(4) Block Mode, VCC = 5 V, 25°C
DO
EEPROM
ORG
CS
SK
DI
VCC
VOLTAGE
DETECTOR
RST or RST
VSS


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