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CAT130089MWI-GT3 Scheda tecnica(PDF) 8 Page - Catalyst Semiconductor

Il numero della parte CAT130089MWI-GT3
Spiegazioni elettronici  Voltage Supervisor with Microwire Serial CMOS EEPROM
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Produttore elettronici  CATALYST [Catalyst Semiconductor]
Homepage  http://www.catalyst-semiconductor.com
Logo CATALYST - Catalyst Semiconductor

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CAT130xx
Doc. No. 1121 Rev. A
8
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Erase/Write Enable and Disable
The CAT130xx powers up in the write disable state.
Any writing after power-up or after an EWDS (write
disable) instruction must first be preceded by the
EWEN (write enable) instruction. Once the write
instruction is enabled, it will remain enabled until power
to the device is removed, or the EWDS instruction is
sent. The EWDS instruction can be used to disable all
CAT130xx write and erase instructions, and will prevent
any accidental writing or clearing of the device. Data
can be read normally from the device regardless of the
write enable/disable status. The EWEN and EWDS
instructions timing is shown in Figure 5.
Write
After receiving a WRITE command (Figure 6), address
and the data, the CS (Chip Select) pin must be
deselected for a minimum of tCSMIN. The falling edge of
CS will start the self clocking for auto-clear and data
store cycles on the memory location specified in the
instruction. The clocking of the SK pin is not
necessary after the device has entered the self
clocking mode. The ready/busy status of the
CAT130xx can be determined by selecting the device
and polling the DO pin. Since this device features
Auto-Clear before write, it is NOT necessary to erase
a memory location before it is written into.
Figure 5. EWEN/EWDS Instruction Timing
Figure 6. Write Instruction Timing
CS
DI
STANDBY
10
0
*
* ENABLE=11
DISABLE=00
SK
SK
CS
DI
DO
tCSMIN
STANDBY
HIGH-Z
HIGH-Z
10
1
AN AN-1
A0
DN
D0
BUSY
READY
STATUS
VERIFY
tSV
tHZ
tEW


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